The challenge of signal integrity in deep-submicrometer CMOS technology

Proceedings of the IEEE

Volumn 89, Issue 4, 2001, Pages 556-573

  Caignet, Fabrice ^a   Delmas Bendhia, Sonia ^a   Sicard, Etienne ^a  

^a INSA   (France)

Author keywords

CMOS; Deep submicrometer technology; Design guidelines; Interconnect models; On chip sampling; Signal integrity

Indexed keywords

EID: 0000239119     PISSN: 00189219     EISSN: None     Source Type: Journal    
DOI: 10.1109/5.920583     Document Type: Article

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