Analysis and avoidance of cross-talk in on-chip buses

Proceedings - Symposium on the High Performance Interconnects, Hot Interconnects

Volumn 2001-January, Issue , 2001, Pages 133-138

  Duan, Chunjie ^a   Tirumala, Anup ^b   Khatri, S P ^c  

^a Ericsson Wireless Communications   (United States)

^b Jasmine Networks Inc   (United States)

^c University of Colorado   (United States)

Author keywords

Capacitance; Chromium; Coupling circuits; Delay; Encoding; Fabrication; Logic; Switches; Very large scale integration; Wire

Indexed keywords

BUSES; CAPACITANCE; CHROMIUM; COUPLED CIRCUITS; CROSSTALK; DELAY CIRCUITS; ECONOMIC AND SOCIAL EFFECTS; ENCODING (SYMBOLS); FABRICATION; SWITCHES; VLSI CIRCUITS; WIRE;

AREA OVERHEAD; CROSS-COUPLING CAPACITANCES; DELAY; DELAY VARIATION; ELECTRICAL STATE; ENCODING SCHEMES; ENCODING TECHNIQUES; LOGIC;

INTEGRATED CIRCUIT INTERCONNECTS;

EID: 84950134284     PISSN: 15504794     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/HIS.2001.946705     Document Type: Conference Paper

References (4)

1. S. P. Khatri, Cross-talk Noise Immune VLSI Design using Regular Layout Fabrics. PhD thesis, UC Berkeley, Dec 1999.
2. K. Kim, K. Baek, N. Shanbhag, C. Liu, and S.-M. Kang, "Coupling-driven signal encoding scheme for low-power interface design," in Proceedings of IEEE/ACM International Conference on Computer-Aided Design, Nov 2000.
3. P. Sotiriadis and A. Chandrakasan, "Bus energy minimizaiton by transition pattern coding (TPC) in deep sub-micron technologies," in Proceedings of IEEE/ACM International Conference on Computer-Aided Design, Nov 2000.
4. L. Nagel, "Spice: A computer program to simulate computer circuits," in University of California, Berkeley UCB/ERL Memo M520, May 1995.