A technology-aware and energy-oriented topology exploration for on-chip networks

Proceedings -Design, Automation and Test in Europe, DATE '05

Volumn II, Issue , 2005, Pages 1238-1243

  Wang, Hangsheng ^a   Peh, Li Shiuan ^a   Malik, Sharad ^a  

^a Princeton University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

NETWORK POWER CONSUMPTION; ON-CHIP INTERCONNECTION FABRIC; ON-CHIP NETWORKS; PACKET-SWITCHING;

BENCHMARKING; ELECTRIC POWER UTILIZATION; ENERGY EFFICIENCY; MICROPROCESSOR CHIPS; SWITCHING NETWORKS; TOPOLOGY;

INTERCONNECTION NETWORKS;

EID: 33645002018     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2005.40     Document Type: Conference Paper

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