Interconnect architecture exploration for low-energy reconfigurable single-chip DSPs

Proceedings - IEEE Computer Society Workshop on VLSI 1999: System Design: Towards System-on-a-Chip Paradigm, VLSI 1999

Volumn , Issue , 1999, Pages 2-8

  Zhang, Hui ^a   Wan, Marlene ^a   George, Varghese ^a   Rabaey, Jan ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ENERGY EFFICIENCY; RECONFIGURABLE ARCHITECTURES; STRUCTURAL DESIGN; SYSTEMS ANALYSIS; VLSI CIRCUITS; WIRELESS TELECOMMUNICATION SYSTEMS;

INTERCONNECT ARCHITECTURES; MESH STRUCTURES; MULTIMEDIA PROCESSING; RECONFIGURABLE; RECONFIGURABLE SYSTEMS; SINGLE CHIPS; WIRELESS COMMUNICATIONS;

INTEGRATED CIRCUIT INTERCONNECTS;

EID: 85008008992     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IWV.1999.760456     Document Type: Conference Paper

References (11)

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