Contact metallization on strained-Si

Solid-State Electronics

Volumn 48, Issue 8, 2004, Pages 1391-1399

  Saha, A R ^a   Chattopadhyay, S ^b   Maiti, C K ^a  

^a INDIAN INSTITUTE OF TECHNOLOGY   (India)

^b NEWCASTLE UNIVERSITY   (United Kingdom)

Author keywords

Barrier height; NiSi; Schottky diode; Strained Si; Surface potential

Indexed keywords

ANNEALING; CAPACITANCE; CHEMICAL VAPOR DEPOSITION; CMOS INTEGRATED CIRCUITS; DIFFUSION; METALLIZING; MOSFET DEVICES; OPTOELECTRONIC DEVICES; SCANNING ELECTRON MICROSCOPY; SCHOTTKY BARRIER DIODES; STRAIN; TRANSMISSION ELECTRON MICROSCOPY; ULTRAHIGH VACUUM;

BARRIER HEIGHT; NISI; STRAINED-SI; SURFACE POTENTIALS;

SILICON;

EID: 2342626619     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sse.2004.02.015     Document Type: Article

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