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Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers

Volumn 43, Issue 1, 2004, Pages 71-76

Extraction of Trap Densities at Front and Back Interfaces in Thin-Film Transistors

(4) Kimura, Mutsumi a Tam, Simon W B b Inoue, Satoshi c Shimoda, Tatsuya c

a RYUKOKU UNIVERSITY (Japan)

b Cambridge Research Laboratory of Epson (United Kingdom)

c SEIKO EPSON CORPORATION (Japan)

Author keywords

Back; Capacitance voltage characteristic; Extraction; Front; Interface; Laser crystallization; Polycrystalline silicon; Thin film transistor; Trap density

Indexed keywords

CAPACITANCE; CARRIER CONCENTRATION; COMPUTER SIMULATION; CRYSTALLIZATION; ELECTRIC POTENTIAL; EXTRACTION; INTERFACES (MATERIALS); LASER BEAMS; POISSON DISTRIBUTION; POLYCRYSTALLINE MATERIALS; POLYSILICON;

BACK; CAPACITANCE-VOLTAGE CHARACTERISTIC; FRONT; INTERFACE; LASER CRYSTALLIZATION; TRAP DENSITY;

THIN FILM TRANSISTORS;

EID: 1842811053 PISSN: 00214922 EISSN: None Source Type: Journal
DOI: 10.1143/JJAP.43.71 Document Type: Article

Times cited : (21)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.