Differentiation of effects due to grain and grain boundary traps in laser annealed poly-Si thin film transistors

Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers

Volumn 37, Issue 4 SUPPL. A, 1998, Pages 1721-1726

  Armstrong, G A ^a   Uppal, S ^a   Brotherton, S D ^b   Ayres, J R ^b  

^a QUEEN'S UNIVERSITY BELFAST   (United Kingdom)

^b PHILIPS RESEARCH LABORATORIES   (Netherlands)

Author keywords

Grain boundaries; Laser anneal; Polysilicon; Semiconductor device simulation; Thin film transistor; Trap density

Indexed keywords

ANNEALING; COMPUTER SIMULATION; CRYSTALLIZATION; ELECTRONIC DENSITY OF STATES; EXCIMER LASERS; GRAIN BOUNDARIES; SEMICONDUCTING SILICON; SEMICONDUCTOR DEVICE MODELS;

FIELD EFFECT CONDUCTANCE METHOD; LASER ANNEALING; POLYSILICON;

THIN FILM TRANSISTORS;

EID: 0032049286     PISSN: 00214922     EISSN: None     Source Type: Journal    
DOI: 10.1143/jjap.37.1721     Document Type: Article

References (24)

1. S. D. Brotherton, D. J. McCulloch. J. P. Gowers, J. R. Ayres and M. J. Trainor: J. Appl. Phys. 82 (1997) 4086.
2. T. Noguchi, A. J. Tang, J. A. Tsai and R. Reif: IEEE Trans. Electron Devices 43 (1996) 1454.
3. P. Legagneux et al: Proc. ESSDERC, Bologna, Italy 1996, p. 1071.
4. G. A. Armstrong, S. D. Brotherton and J. R. Ayres: Solid-State Electron. 39 (1997) 1337.
5. G. A. Armstrong, S. Uppal, S. D. Brotherton and J. R. Ayres: IEEE Electron Device Lett. 18 (1997) 315.
6. J. Jomaah, G. Ghibaudo and F. Balestra: Solid-State Electron. 38 (1995) 615.
7. M. Berger and Z. Chai: IEEE Trans. Electron Devices 38 (1991) 871.
8. C. A. Dimitriadis and D. H. Tassis: J. Appl. Phys. 77 (1995) 2177.
9. T-J. King, M. G. Hack and I.-W. Wu: J. Appl. Phys. 75 (1994) 908.
10. M. Hack and A. G. Lewis: IEEE Electron Device Lett. 12 (1991) 203.
11. T. S. Li and P. S. Lin: IEEE Electron Device Lett. 14 (1993) 240.
12. G. Fortunato: Proc. POLYSE, Lake Garda, Italy, 1995, p. 585.
13. M. Hack and J. G. Shaw: Ext. Abst. 22nd Int. Conf. on Solid State Devices and Materials, Sendai, 1990, p. 999.
14. T. Serikawa, S. Shirai, A. Okamoto and S. Suyama: Jpn. J. Appl. Phys. 28 (1989) L1871.
15. R. Guerreri, P. Ciampolini, A. Gnudi, M. Rudan and G. Baccarani: IEEE Trans. Electron Devices 33 (1986) 1201.
16. ATLAS software manual, Silvaco International, 1996.
17. M. J. Edwards, S. D. Brotherton, J. R. Ayres, D. J. McCullough and J. P. Cowers: Proc. Asia Display '95, Hamamatsu, Japan, 1995, p. 335.
18. G. Fortunato and P. Migliorato: Appl. Phys. Lett. 49 (1986) 1025.
19. G. Fortunato, D. B. Meakin, P. Migliorato and P. G. Le Comber: Philos. Mag. B 57 (1988) 573.
20. S. Selberherr: Analysis and Simulation of Semiconductor Devices (Springer-Verlag, New York, 1984).
21. P. V. Evans and S. F. Nelson: J. Appl. Phys. 69 (1991) 3605.
22. C. A. Dimitriadis: J. Appl. Phys. 73 (1993) 4086.
23. C. Li: Memo UCB/ERL m93/82, Electronics Research Laboratory, University of California, Berkeley, 1993.
24. K. Lee, M. Shur, T. Fjeldly and T. Ytterdal: Semiconductor Device Modelling for VLSI (Prentice Hall, Englewood Cliffs, 1993).