Test power: A big issue in large SOC designs

Proceedings - 1st IEEE International Workshop on Electronic Design, Test and Applications, DELTA 2002

Volumn , Issue , 2002, Pages 447-449

  Bonhomme, Y ^a   Girard, P ^a   Landrault, C ^a   Pravossoudovitch, S ^a  

^a LIRMM   (France)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; MICROPROCESSOR CHIPS; PROGRAMMABLE LOGIC CONTROLLERS;

EMBEDDED CORES; LARGE SYSTEM; LOW POWER TESTING; POWER CONSUMED; SOC DESIGNS; STATE OF THE ART; TEST POWER;

SYSTEM-ON-CHIP;

EID: 13244280925     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DELTA.2002.994670     Document Type: Conference Paper

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