POWERTEST: A tool for energy conscious weighted random pattern testing

Proceedings of the IEEE International Conference on VLSI Design

Volumn , Issue , 1999, Pages 416-422

  Zhang, Xiaodong ^a   Roy, Kaushik ^a   Bhawmik, Sudipta ^a  

^a PURDUE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AUTOMATA THEORY; BUILT-IN SELF TEST; COMPUTER AIDED NETWORK ANALYSIS; CONTROLLABILITY; DESIGN FOR TESTABILITY; GENETIC ALGORITHMS; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT TESTING; OBSERVABILITY; OPTIMIZATION; PROBABILITY; SHIFT REGISTERS;

CELLULAR AUTOMATA; ENERGY CONSCIOUS TESTING; LINEAR FEEDBACK SHIFT REGISTERS; SOFTWARE PACKAGE POWERTEST; WEIGHTED RANDOM PATTERN TESTING;

VLSI CIRCUITS;

EID: 0032735756     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (21)