A recombination- and trap-assisted tunneling model for stress-induced leakage current

Solid-State Electronics

Volumn 45, Issue 8, 2001, Pages 1361-1369

  Ielmini, Daniele ^a   Spinelli, Alessandro S ^b   Lacaita, Andrea L ^a   Martinelli, Andrea ^a   Ghidini, Gabriella ^c  

^a POLITECNICO DI MILANO   (Italy)

^b UNIVERSITY OF INSUBRIA   (Italy)

^c STMICROELECTRONICS   (Italy)

Author keywords

MOS devices; SILC; Trap assisted tunneling; Ultrathin oxides

Indexed keywords

DATA STORAGE EQUIPMENT; ELECTRON TRAPS; ELECTRON TUNNELING; HOLE TRAPS; LEAKAGE CURRENTS; SILICA; ULTRATHIN FILMS;

STRESS INDUCED LEAKAGE CURRENTS (SILC); TRAP-ASSISTED TUNNELING MODELS;

MOS DEVICES;

EID: 0035417256     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0038-1101(01)00173-3     Document Type: Article

References (42)

1. Reliability projection for ultra-thin oxides at low voltage
2. Reliability of thin dielectric for non-volatile applications
3. Reliability issues of Flash memory cells
4. Read-disturb degradation mechanism due to electron trapping in the tunnel oxide for low-voltage flash memories
5. 2PROM devices
6. 2 interface observed by Fowler-Nordheim tunneling
7. 2 interface during Fowler-Nordheim tunneling
8. Correlation of stress-induced leakage current in thin oxides with trap generation inside the oxides
9. Mechanism for stress-induced leakage currents in thin silicon dioxide films
10. The effect of trapping states on tunneling in metal-semiconductor junctions
11. Stress-induced current in thin silicon dioxide films
12. Trap assisted tunneling as a mechanism of degradation and noise
13. Experimental evidence of inelastic tunneling and new I-V model for stress-induced leakage current
14. Stress-induced low-level leakage mechanism in ultrathin silicon dioxide films caused by neutral oxide trap generation
15. 2 films
16. Effects of erase source bias on Flash EEPROM device reliability
17. A hot carrier induced low-level leakage current in thin silicon dioxide films
18. Trapped hole enhanced stress induced leakage current in NAND EEPROM tunnel oxides
19. Hot hole stress induced leakage current (SILC) transient in tunnel oxide
20. Field and high-temperature dependence of the long term charge loss in erasable programmable read only memories: Measurements and modeling
21. Deep-trap SILC (stress-induced leakage current) model for nominal and weak oxides
22. 2 films
23. Explanation of stress-induced damage in thin oxides
24. Separation of electron and hole traps by transient current analysis
25. Experimental examination of physical model for direct tunneling current in unstressed/stressed ultrathin gate oxides
26. Quantum yield of electron impact ionization in silicon
27. Experimental and numerical analysis of the quantum yield
28. Low level leakage currents in thin silicon oxide films
29. A new write/erase method to improve the read disturb characteristics based on the decay phenomena of stress leakage current for flash memories
30. Experimental evidence for recombination-assisted leakage in thin oxides
31. 2PROM's - Part I: A quantitative model for steady-state SILC
32. Excess tunnel current in silicon Esaki junctions
33. Forward-bias tunneling: A limitation to bipolar device scaling
34. A new recombination model for device simulation including tunneling
35. Statistical PN junction leakage model with trap level fluctuation for Tref (refresh time)-oriented DRAM design
36. Two components of tunneling current in metal-oxide-semiconductor structures
37. 2 on silicon induced by corona charging of the unmetallized surface
38. A hot hole-induced low-level leakage current in thin silicon dioxide films
39. Experimental method for the determination of the energy distribution of stress-induced oxide traps
40. Modeling of SILC based on electron and hole tunneling - Part I: Transient effects
41. Low voltage stress-induced-leakage-current in ultrathin gate oxides
42. Role of interface and bulk defect-states in the low-voltage leakage conduction of ultrathin oxides