Role of interface and bulk defect-states in the low-voltage leakage conduction of ultrathin oxides

European Solid-State Device Research Conference

Volumn , Issue , 2000, Pages 312-315

  Ielmini, D ^a   Spinelli, A S ^b   Lacaita, A ^a   Ghidini, G ^c  

^a POLITECNICO DI MILANO   (Italy)

^b UNIVERSITY OF INSUBRIA   (Italy)

^c STMICROELECTRONICS   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; DEFECTS; SOLID STATE DEVICES;

CONDUCTION PROCESS; ELECTRON-HOLE RECOMBINATION; LEAKAGE CONDUCTION; LEAKAGE EFFECTS; LEAKAGE MECHANISM; LOW VOLTAGES; TRAP ASSISTED TUNNELING; ULTRA-THIN OXIDE;

INTERFACE STATES;

EID: 0003385040     PISSN: 19308876     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSDERC.2000.194777     Document Type: Conference Paper

References (8)

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8. D. Ielmini, A. S. Spinelli, A. L. Lacaita, and G. Ghidini, in IRPS Proc. (2000).