Design, fabrication, and analysis of SiGeC heterojunction PMOSFETs

IEEE Transactions on Electron Devices

Volumn 47, Issue 9, 2000, Pages 1715-1725

  Quinones, Eduardo Jose ^a,d   John, Soji ^b   Ray, Samit K ^c   Banerjee, Sanjay Kumar ^d  

^a IEEE   (United States)

^b The University of Texas at Austin   (United States)

^c TEXAS INSTRUMENTS   (United States)

^d INDIAN INSTITUTE OF TECHNOLOGY   (India)

Author keywords

[No Author keywords available]

Indexed keywords

CARBON; COMPUTER SIMULATION; CURRENT VOLTAGE CHARACTERISTICS; HETEROJUNCTIONS; SEMICONDUCTING SILICON COMPOUNDS; SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR DEVICE STRUCTURES; TEMPERATURE;

SATURATION MOBILITY; SOFTWARE PACKAGE MEDICI; STRAIN STABILIZING CAPABILITIES;

MOSFET DEVICES;

EID: 0034272827     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.861582     Document Type: Article

References (23)

1. J. O. Weidner, K. R. Hofmann, F. Hofmann, and L. Risch, "Characterization of SiGe quantum-well p-channel MOSFETs.," J. Mater. Sci., vol. 6, p. 325, Oct. 1995.
2. D. K. Nayaketal., "High-mobility GeSi PMOS on SIMOX," IEEE Electron Device Lett., vol. 14, p. 520, 1993.
3. K. Eberl et al., "Growth and strain compensation effects in the ternary Sii -x -yGe.Cj, alloy system," Appl. Phys. Lett., vol. 60, p. 3033, June 1992.
4. J. L. Regolini, F. Gisbert, G. Dollino, and P. Boucaud, "Growth and characterization of strain compensated Sii -x -yGer Cu epitaxial layers," Mater. Lett., vol. 18, p. 57, Nov. 1993.
5. L. D. Lanzerotti et at., "Si/Sii -x -yGexCaSi heterojunction bipolar transistors," IEEE Electron Device Lett., vol. 17, p. 334, July 1996.
6. A. St.Amour etal., "Defect-free band-edge photoluminescence and band gap measurement of pseudomorphic Sii -x -yGexCa alloy layers on Si(lOO)," Appl. Phys. Lett., vol. 67, p. 3915, Dec. 1995.
7. K. Rim et al, "Capacitance-voltage characteristics of p-Si/SiGeC MOS capacitors," Proc. Materials Research Soc. Symp.,vol. 379, p. 327, 1995.
8. S. K. Ray, S. John, S. Oswal, and S. K. Banerjee, "Novel SiGeC channel heterojunction PMOSFET," in IEDM Tech. Dig., vol. 43, 1996, pp. 261-264.
9. P. E. Hellberg, S. L. Zhang, F. M. D'Heurle, and C. S. Peterson, "Oxidation of silicon-germanium alloys. I. An experimental study," J. Appl. Phys., vol. 82, p. 5773, Dec. 1997.
10. P. W. Li and E. S. Yang, "SiGe gate oxide prepared at low-temperatures in an electron cyclotron resonance plasma," Appl. Phys. Lett., vol. 63, p. 2938, Nov. 1993.
11. A. E. Bairet at., "Wet oxidation of Sii -x -yGex layers on (100) Si.," in Proc. Materials Research Soc. Symp., 1995, p. 625.
12. Technol. Model. Assoc., Sunnyvale, CA, 1998.
13. C. Li, S. John, E. Quinones, and S. Banerjee, "Cold-wall ultrahigh vacuum chemical vapor deposition of doped and undoped Si and Sii -xGex epitaxial films using SiH4/ and S2H6," J.Vacuum Sci. Technol. A , vol. 14, no. 1, pp. 170-183, Jan.-Feb. 1996.
14. D. K. Schröder, Semiconducor Material and Device Characterization, 2nd ed. New York: Wiley, 1998.
15. P. I. Suciu and R. L. Johnston, "Experimental derivation of the source and drain resistance of MOS transistors," IEEE Trans. Electron Devices, vol. 27, p. 1846, Sept. 1980.
16. S. Verdonckt-Vandebroek et al., "SiGe-channel heterojunction p-MOSFET's," IEEE Trans. Electron Devices, vol. 41, p. 90, Jan. 1994.
17. S. P. Voinigescu, C. A. T. Salama, J. P. Noel, and T. I. Kamins, "Optimized Ge channel profiles for VLSI compatible Si/SiGe p-MOSFET's," in IEDM Tech. Dig., vol. 41, 1994, p. 369.
18. S. John et al, "Surface morphology of Sii-GeCj, epitaxial films deposited by low temperature UHV-CVD," in Proc. Materials Research Soc. Symp., 1997, p. 275.
19. R. B. Beck, T. Brozek, and J. Ruzyllo, "Influence of silicon surface carbon contamination on oxide quality and SiO2-Si systems properties," in Proc. SPIE, vol. 1783, 1992, p. 356.
20. J. M. Hinckley and J. Singh, "Hole transport theory in pseudomorphic Sii -x/Ge.T alloys grown on Si(OOl) substrates," Phys. Rev. B, vol. 41, p. 2912, Feb. 1990.
21. S. Takagi, A. Toriumi, M. Iwase, and H. Tango, "On the universality of inversion layer mobility in Si MOSFET's: Part I-effects of substrate impurity concentration"," IEEE Trans. Electron Devices, vol. 41, p. 2357, Dec. 1994.
22. H. J. Osten and P. Gaworsewski, "Charge transport in strained Sii i/Ci/ andSii-GeCj, alloys on Si(OOl)," J. Appl. Phys., vol. 82, p. 4677, Nov. 1997.
23. T. Ohmi et al, "Dependence of thin-oxide films quality on surface microroughness," IEEE Trans. Electron Devices, vol. 39, p. 537, Mar. 1992.