Design issues and insights for low-voltage high-density SOI DRAM

IEEE Transactions on Electron Devices

Volumn 45, Issue 5, 1998, Pages 1055-1062

  Possum, Jerry G ^a   Chiang, Meng Hsueh ^b   Houston, Theodore W ^a  

^a University of Florida   (United States)

^b TEXAS INSTRUMENTS   (United States)

Author keywords

Circuit simulation; CMOS digital integrated circuits; Integrated circuit design; Silicon on insulator technology

Indexed keywords

COMPUTER SIMULATION; DIGITAL INTEGRATED CIRCUITS; INTEGRATED CIRCUIT LAYOUT; MOS DEVICES; MOSFET DEVICES; SEMICONDUCTOR DEVICE MODELS; SILICON ON INSULATOR TECHNOLOGY;

DYNAMIC RANDOM ACCESS MEMORY (DRAM); PARTIALLY DEPLETED (PD) DEVICES;

RANDOM ACCESS STORAGE;

EID: 0032073371     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.669528     Document Type: Article

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