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Volumn 2015-April, Issue , 2015, Pages 812-817

Axilog: Language support for approximate hardware design

Author keywords

[No Author keywords available]

Indexed keywords

ABSTRACTING; AUTOMATION; BENCHMARKING; ENERGY EFFICIENCY; SEMANTICS;

EID: 84945965935     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.7873/date.2015.0513     Document Type: Conference Paper
Times cited : (59)

References (20)
  • 3
    • 84859059850 scopus 로고    scopus 로고
    • Ersa: Error resilient system architecture for probabilistic applications
    • H. Cho, L. Leem, and S. Mitra, Ersa: Error resilient system architecture for probabilistic applications, in TCAD, 2012
    • (2012) TCAD
    • Cho, H.1    Leem, L.2    Mitra, S.3
  • 4
    • 80052700256 scopus 로고    scopus 로고
    • IMPACT: Imprecise adders for low-power approximate computing
    • V. Gupta et al., IMPACT: imprecise adders for low-power approximate computing, in ISLPED, 2011
    • (2011) ISLPED
    • Gupta, V.1
  • 5
    • 84893360544 scopus 로고    scopus 로고
    • On reconfigurationoriented approximate adder design and its application
    • R. Ye, T. Wang, F. Yuan, R. Kumar, and Q. Xu, On reconfigurationoriented approximate adder design and its application, in ICCAD, 2013
    • (2013) ICCAD
    • Ye, R.1    Wang, T.2    Yuan, F.3    Kumar, R.4    Xu, Q.5
  • 6
    • 77953116665 scopus 로고    scopus 로고
    • Approximate logic synthesis for error tolerant applications
    • D. Shin and S. K. Gupta, Approximate logic synthesis for error tolerant applications, in DATE, 2010
    • (2010) DATE
    • Shin, D.1    Gupta, S.K.2
  • 7
    • 79952849170 scopus 로고    scopus 로고
    • Trading accuracy for power with an underdesigned multiplier architecture
    • P. Kulkarni, P. Gupta, and M. Ercegovac, Trading accuracy for power with an underdesigned multiplier architecture, in VLSI, 2011
    • (2011) VLSI
    • Kulkarni, P.1    Gupta, P.2    Ercegovac, M.3
  • 8
    • 84863554442 scopus 로고    scopus 로고
    • Accuracy-configurable adder for approximate arithmetic designs
    • A. Kahng and S. Kang, Accuracy-configurable adder for approximate arithmetic designs, in DAC, 2012
    • (2012) DAC
    • Kahng, A.1    Kang, S.2
  • 9
    • 79957536506 scopus 로고    scopus 로고
    • Design of voltage-scalable meta-functions for approximate computing
    • D. Mohapatra et al., Design of voltage-scalable meta-functions for approximate computing, in DATE, 2011
    • (2011) DATE
    • Mohapatra, D.1
  • 10
    • 1842425446 scopus 로고    scopus 로고
    • Speeding up processing with approximation circuits
    • S.-L. Lu, Speeding up processing with approximation circuits, Computer, 2004
    • (2004) Computer
    • Lu, S.-L.1
  • 11
    • 84863541914 scopus 로고    scopus 로고
    • Salsa: Systematic logic synthesis of approximate circuits
    • S. Venkataramani et al., Salsa: systematic logic synthesis of approximate circuits, in DAC, 2012
    • (2012) DAC
    • Venkataramani, S.1
  • 12
    • 84903831997 scopus 로고    scopus 로고
    • Abacus: A technique for automated behavioral synthesis of approximate computing circuits
    • K. Nepal, Y. Li, R. Bahar, and S. Reda, Abacus: a technique for automated behavioral synthesis of approximate computing circuits, in DATE, 2014
    • (2014) DATE
    • Nepal, K.1    Li, Y.2    Bahar, R.3    Reda, S.4
  • 13
    • 84872343313 scopus 로고    scopus 로고
    • On logic synthesis for timing speculation
    • Y. Liu et al., On logic synthesis for timing speculation, in ICCAD, 2012
    • (2012) ICCAD
    • Liu, Y.1
  • 14
    • 84862690555 scopus 로고    scopus 로고
    • Algorithmic methodologies for ultra-efficient inexact architectures for sustaining technology scaling
    • A. Lingamneni et al., Algorithmic methodologies for ultra-efficient inexact architectures for sustaining technology scaling, in CF, 2012
    • (2012) CF
    • Lingamneni, A.1
  • 15
    • 84893368533 scopus 로고    scopus 로고
    • Approximate logic synthesis under general error magnitude and frequency constraints
    • J. Miao, A. Gerstlauer, and M. Orshansky, Approximate logic synthesis under general error magnitude and frequency constraints, in ICCAD, 2013
    • (2013) ICCAD
    • Miao, J.1    Gerstlauer, A.2    Orshansky, M.3
  • 16
    • 84879850365 scopus 로고    scopus 로고
    • Relax-and-retime: A methodology for energy-efficient recovery based design
    • S. Ramasubramanian et al., Relax-and-retime: A methodology for energy-efficient recovery based design, in DAC, 2013
    • (2013) DAC
    • Ramasubramanian, S.1
  • 17
    • 84903835442 scopus 로고    scopus 로고
    • Improving efficiency of extensible processors by using approximate custom instructions
    • M. Kamal, A. Ghasemazar, A. Afzali-Kusha, and M. Pedram, Improving efficiency of extensible processors by using approximate custom instructions, in DATE, 2014
    • (2014) DATE
    • Kamal, M.1    Ghasemazar, A.2    Afzali-Kusha, A.3    Pedram, M.4
  • 18
    • 79959878920 scopus 로고    scopus 로고
    • EnerJ: Approximate data types for safe and general low-power computation
    • A. Sampson et al., EnerJ: Approximate data types for safe and general low-power computation, PLDI, 2011
    • (2011) PLDI
    • Sampson, A.1
  • 20
    • 84892665140 scopus 로고    scopus 로고
    • A variability-aware OpenMP environment for efficient execution of accuracy-configurable computation on shared-fpu processor clusters
    • A. Rahimi, A. Marongiu, R. Gupta, and L. Benini, A variability-aware OpenMP environment for efficient execution of accuracy-configurable computation on shared-fpu processor clusters, in CODES+ISSS, 2013
    • (2013) CODES+ISSS
    • Rahimi, A.1    Marongiu, A.2    Gupta, R.3    Benini, L.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.