메뉴 건너뛰기




Volumn , Issue , 2013, Pages

A variability-aware OpenMP environment for efficient execution of accuracy-configurable computation on shared-FPU processor clusters

Author keywords

Approximation; Floating point; Multi core; OpenMP; PVT variability; Resilient; Timing error

Indexed keywords

APPLICATION PROGRAMMING INTERFACES (API); DIGITAL ARITHMETIC; ERROR CORRECTION; HARDWARE; IMAGE PROCESSING; METADATA; RECONFIGURABLE ARCHITECTURES; SCHEDULING;

EID: 84892665140     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CODES-ISSS.2013.6659022     Document Type: Conference Paper
Times cited : (28)

References (34)
  • 1
    • 84871755652 scopus 로고    scopus 로고
    • Underdesigned and opportunistic computing in presence of hardware variability
    • P. Gupta, et al., "Underdesigned and Opportunistic Computing in Presence of Hardware Variability," IEEE Trans. on CAD of Inte-grated Circuits and Systems 32(1) (2012), pp. 489-499.
    • (2012) IEEE Trans. on CAD of Inte-grated Circuits and Systems , vol.32 , Issue.1 , pp. 489-499
    • Gupta, P.1
  • 2
    • 81355136058 scopus 로고    scopus 로고
    • Design and architectures for dependable embedded systems
    • J. Henkel, et al., "Design and architectures for dependable embedded systems," Proc. ACM/IEEE CODES+ISSS, 2011, pp. 69-78.
    • (2011) Proc. ACM/IEEE CODES+ISSS , pp. 69-78
    • Henkel, J.1
  • 3
    • 84892644181 scopus 로고    scopus 로고
    • ITRS [Online].
    • ITRS [Online]. Available: http://public.itrs.net
  • 4
    • 58149267845 scopus 로고    scopus 로고
    • Energy-efficient and metastability-immune resilient circuits for dynamic variation tolerance
    • K.A. Bowman, et al., "Energy-Efficient and Metastability-Immune Resilient Circuits for Dynamic Variation Tolerance," IEEE Journal of Solid-State Circuits 44(1) (2009), pp. 49-63.
    • (2009) IEEE Journal of Solid-State Circuits , vol.44 , Issue.1 , pp. 49-63
    • Bowman, K.A.1
  • 5
    • 79953189649 scopus 로고    scopus 로고
    • Tunable Replica Bits for Dynamic Variation Tolerance in 8T SRAM Arrays
    • A. Raychowdhury, et al., "Tunable Replica Bits for Dynamic Variation Tolerance in 8T SRAM Arrays," IEEE Journal of Solid-State Circuits 46(4) (2011), pp.797-805.
    • (2011) IEEE Journal of Solid-State Circuits , vol.46 , Issue.4 , pp. 797-805
    • Raychowdhury, A.1
  • 6
    • 78650861417 scopus 로고    scopus 로고
    • A 45 nm resilient microprocessor core for dynamic variation tolerance
    • K.A. Bowman, et al., "A 45 nm Resilient Microprocessor Core for Dynamic Variation Tolerance," IEEE Journal of Solid-State Cir-cuits 46(1) (2011), pp. 194-208.
    • (2011) IEEE Journal of Solid-State Cir-cuits , vol.46 , Issue.1 , pp. 194-208
    • Bowman, K.A.1
  • 7
    • 84873408154 scopus 로고    scopus 로고
    • Variation-tolerant architecture for ultra low power shared-L1 processor clusters
    • M.R. Kakoee, I. Loi, L. Benini, "Variation-Tolerant Architecture for Ultra Low Power Shared-L1 Processor Clusters," IEEE Trans. on Circuits and Systems II 59(12) (2012), pp.927-931.
    • (2012) IEEE Trans. on Circuits and Systems II , vol.59 , Issue.12 , pp. 927-931
    • Kakoee, M.R.1    Loi, I.2    Benini, L.3
  • 9
    • 84892632509 scopus 로고    scopus 로고
    • Bulldozer
    • AMD [online].
    • AMD "Bulldozer" Core Technology [online]. Available: http://www.sgi.com/partners/technology/downloads/ADM-Bulldozer-Core-Technology. pdf
    • Core Technology
  • 10
    • 84862068210 scopus 로고    scopus 로고
    • Analysis of instruction-level vulnerability to dynamic voltage and temperature variations
    • A. Rahimi, L. Benini, R. K. Gupta, "Analysis of Instruction-level Vulnerability to Dynamic Voltage and Temperature Variations," Proc. ACM/IEEE DATE, 2012, pp. 1102-1105.
    • (2012) Proc. ACM/IEEE DATE , pp. 1102-1105
    • Rahimi, A.1    Benini, L.2    Gupta, R.K.3
  • 11
    • 84892648576 scopus 로고    scopus 로고
    • Application-adaptive guardbanding to mitigate static and dynamic variability
    • A. Rahimi, L. Benini, R. K. Gupta, "Application-Adaptive Guardbanding to Mitigate Static and Dynamic Variability," IEEE Transactions on Computers, 2013.
    • (2013) IEEE Transactions on Computers
    • Rahimi, A.1    Benini, L.2    Gupta, R.K.3
  • 12
    • 84865556709 scopus 로고    scopus 로고
    • Procedure hopping: A low over-head solution to mitigate variability in shared-L1 processor clus-ters
    • A. Rahimi, L. Benini, R. K. Gupta, "Procedure hopping: a low over-head solution to mitigate variability in shared-L1 processor clus-ters," Proc. ACM/IEEE ISLPED, 2012, pp. 415-420.
    • (2012) Proc. ACM/IEEE ISLPED , pp. 415-420
    • Rahimi, A.1    Benini, L.2    Gupta, R.K.3
  • 14
    • 84863554442 scopus 로고    scopus 로고
    • Accuracy-configurable adder for approxi-mate arithmetic designs
    • A. B. Kahng, S. Kang, "Accuracy-Configurable Adder for Approxi-mate Arithmetic Designs," Proc. ACM/IEEE DAC, 2012, pp. 820-825.
    • (2012) Proc. ACM/IEEE DAC , pp. 820-825
    • Kahng, A.B.1    Kang, S.2
  • 15
    • 84858790858 scopus 로고    scopus 로고
    • Architecture support for disciplined approximate programming
    • H. Esmaeilzadeh, A. Sampson, L. Ceze, D. Burger, "Architecture Support for Disciplined Approximate Programming," Proc. ACM ASPLOS, 2012, pp. 301-312.
    • (2012) Proc. ACM ASPLOS , pp. 301-312
    • Esmaeilzadeh, H.1    Sampson, A.2    Ceze, L.3    Burger, D.4
  • 16
    • 77953110390 scopus 로고    scopus 로고
    • ERSA: Error Resilient System Architecture for probabilistic applications
    • L. Leem, et al., "ERSA: Error Resilient System Architecture for probabilistic applications," Proc. ACM/IEEE DATE, 2010, pp. 1560-1565.
    • (2010) Proc. ACM/IEEE DATE , pp. 1560-1565
    • Leem, L.1
  • 17
    • 78650896343 scopus 로고    scopus 로고
    • Within-Die Variation-Aware Dynamic-Voltage-Frequency-Scaling with Optimal Core Allocation and Thread Hop-ping for the 80-Core TeraFLOPS Processor
    • S. Dighe, et al., "Within-Die Variation-Aware Dynamic-Voltage- Frequency-Scaling With Optimal Core Allocation and Thread Hop-ping for the 80-Core TeraFLOPS Processor," IEEE Journal of Solid-State Circuits 46(1) (2011), pp. 184-193.
    • (2011) IEEE Journal of Solid-State Circuits , vol.46 , Issue.1 , pp. 184-193
    • Dighe, S.1
  • 18
    • 79959878920 scopus 로고    scopus 로고
    • Ener j: Approximate data types for safe and general low-power computation
    • A. Sampson, et al., "Ener J: Approximate data types for safe and general low-power computation," Proc. ACM PLDI, 2011, pp. 164-174.
    • (2011) Proc. ACM PLDI , pp. 164-174
    • Sampson, A.1
  • 19
    • 77954707631 scopus 로고    scopus 로고
    • Green: A framework for supporting energy-conscious programming using controlled approximation
    • W. Baek and T. M. Chilimbi, "Green: A framework for supporting energy-conscious programming using controlled approximation," Proc. ACM PLDI, 2010, pp. 198-209.
    • (2010) Proc. ACM PLDI , pp. 198-209
    • Baek, W.1    Chilimbi, T.M.2
  • 20
    • 84862104198 scopus 로고    scopus 로고
    • P2012: Building an ecosystem for a scalable, modular and high-efficiency embedded computing accelerator
    • L. Benini, E. Flamand, D. Fuin, D. Melpignano, "P2012: Building an ecosystem for a scalable, modular and high-efficiency embedded computing accelerator," Proc. ACM/IEEE DATE, 2012, pp. 983-987.
    • (2012) Proc. ACM/IEEE DATE , pp. 983-987
    • Benini, L.1    Flamand, E.2    Fuin, D.3    Melpignano, D.4
  • 21
    • 80053505095 scopus 로고    scopus 로고
    • A fully-synthesizable single-cycle interconnection network for shared-L1 processor clusters
    • A. Rahimi, I. Loi, M.R. Kakoee, L. Benini, "A Fully-Synthesizable Single-Cycle Interconnection Network for Shared-L1 Processor Clusters," Proc. ACM/IEEE DATE, 2011, pp. 1-6.
    • (2011) Proc. ACM/IEEE DATE , pp. 1-6
    • Rahimi, A.1    Loi, I.2    Kakoee, M.R.3    Benini, L.4
  • 23
    • 72049102935 scopus 로고    scopus 로고
    • Energy-aware probabilistic multiplier: Design and analysis
    • M. S. Lau, et al. "Energy-Aware Probabilistic Multiplier: Design and Analysis", Proc. ACM/IEEE CASES, 2009, pp. 281-290.
    • (2009) Proc. ACM/IEEE CASES , pp. 281-290
    • Lau, M.S.1
  • 24
    • 13244282954 scopus 로고    scopus 로고
    • Intelligible test techniques to support error-tolerance
    • M. A. Breuer, "Intelligible Test Techniques to Support Error-Tolerance", Proc. Asian Test Symp., 2004, pp. 386-393.
    • (2004) Proc. Asian Test Symp. , pp. 386-393
    • Breuer, M.A.1
  • 27
    • 84872969670 scopus 로고    scopus 로고
    • OpenMP-based synergistic parallelization and HW acceleration for on-chip multi-core shared-memory clusters
    • P. Burgio, et al., "OpenMP-based synergistic parallelization and HW acceleration for on-chip multi-core shared-memory clusters," Proc. ACM/IEEE DSD, 2012, pp. 751-758.
    • (2012) Proc. ACM/IEEE DSD , pp. 751-758
    • Burgio, P.1
  • 28
    • 84892659432 scopus 로고    scopus 로고
    • FloPoCo [Online].
    • FloPoCo [Online]. Available: http://flopoco.gforge.inria.fr/
  • 31
    • 33750596850 scopus 로고    scopus 로고
    • Reversed temperature-dependent propagation delay characteristics in nanometer CMOS circuits
    • R. Kumar, V. Kursun, "Reversed Temperature-Dependent Propagation Delay Characteristics in Nanometer CMOS Circuits," IEEE Transactions on Circuits and Systems 53(10) (2006), pp.1078-1082.
    • (2006) IEEE Transactions on Circuits and Systems , vol.53 , Issue.10 , pp. 1078-1082
    • Kumar, R.1    Kursun, V.2
  • 32
    • 63449116547 scopus 로고    scopus 로고
    • An asynchronous power aware and adaptive noc based circuit
    • E. Beigne, et al., "An Asynchronous Power Aware and Adaptive NoC Based Circuit," IEEE J. of Solid-State Circuits 44(4) (2009).
    • (2009) IEEE J. of Solid-State Circuits , vol.44 , Issue.4
    • Beigne, E.1
  • 33
    • 79956372269 scopus 로고    scopus 로고
    • Low-energy GALS NoC with FIFO-monitoring dynamic voltage scaling
    • A. Rahimi, M. E. Salehi, S. Mohammadi, S. M. Fakhraie, "Low-energy GALS NoC with FIFO-monitoring dynamic voltage scaling," Microelectronics Journal 42(6) (2011), pp. 889-896.
    • (2011) Microelectronics Journal , vol.42 , Issue.6 , pp. 889-896
    • Rahimi, A.1    Salehi, M.E.2    Mohammadi, S.3    Fakhraie, S.M.4
  • 34
    • 79955717091 scopus 로고    scopus 로고
    • A fully-integrated 3-level DC/DC converter for nanosecond-scale DVS with fast shunt regulation
    • W. Kim, D.M. Brooks, G. Wei, "A fully-integrated 3-level DC/DC converter for nanosecond-scale DVS with fast shunt regulation," Proc. IEEE ISSCC, 2011, pp.268-270.
    • (2011) Proc. IEEE ISSCC , pp. 268-270
    • Kim, W.1    Brooks, D.M.2    Wei, G.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.