Improving efficiency of extensible processors by using approximate custom instructions

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2014, Pages

  Kamal, Mehdi ^a   Ghasemazar, Amin ^a   Afzali Kusha, Ali ^a   Pedram, Massoud ^b  

^a UNIVERSITY OF TEHRAN   (Iran)

^b University of Southern California   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; DISCRETE COSINE TRANSFORMS; EMBEDDED SYSTEMS;

APPROXIMATE RESULTS; CUSTOM INSTRUCTION; DISCRETE COSINE TRANSFORM(DCT); EXTENSIBLE PROCESSORS; IMPROVING EFFICIENCY; INSTRUCTION SET ARCHITECTURE; PROCESS VARIATION; PROPAGATION DELAYS;

DESIGN;

EID: 84903835442     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.7873/DATE2014.238     Document Type: Conference Paper

References (8)

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6. M. Kamal, et al., "An Architecture-Level Approach for Mitigating the Impact of Process Variations on Extensible Processors," In Proceedings of Design, Automation and Test in Europe (DATE), 2012, pp. 467-472.
7. L. Pozzi, et al., "Exact and Approximate Algorithms for the Extension of Embedded Processor Instruction Sets", IEEE Transactions of Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 25, No. 7, July 2006.
8. Nangate 45nm Open Cell Library. http://www.nangate.com/.