STT-SNN: A Spin-Transfer-Torque Based Soft-Limiting Non-Linear Neuron for Low-Power Artificial Neural Networks

IEEE Transactions on Nanotechnology

Volumn 14, Issue 6, 2015, Pages 1013-1023

  Fan, Deliang ^a   Shim, Yong ^a   Raghunathan, Anand ^a   Roy, Kaushik ^a  

^a PURDUE UNIVERSITY   (United States)

Author keywords

Artificial neural networks; Magnetic domain walls; Magnetic domains; Magnetic tunneling; Neurons; Resistance; Transfer functions

Indexed keywords

CHARACTER RECOGNITION; CMOS INTEGRATED CIRCUITS; COMPLEX NETWORKS; DOMAIN WALLS; ELECTRIC RESISTANCE; ENERGY EFFICIENCY; ENERGY UTILIZATION; LOW POWER ELECTRONICS; MAGNETIC DOMAINS; MAGNETIC LEVITATION VEHICLES; MAGNETIC LOGIC DEVICES; MAGNETISM; NEURONS; TRANSFER FUNCTIONS;

ARTIFICIAL NEURONS; CONTINUOUS RESISTANCES; LOW SUPPLY VOLTAGES; MAGNETIC TUNNELING; MICROMAGNETIC SIMULATIONS; ORDERS OF MAGNITUDE; SPIN TRANSFER TORQUE; WEIGHTED SUMMATIONS;

NEURAL NETWORKS;

EID: 84942344133     PISSN: 1536125X     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNANO.2015.2437902     Document Type: Article

References (37)

1. R. Lippmann, "An introduction to computing with neural nets," IEEE ASSP Mag., vol. 4, no. 2, pp. 4-22, Apr. 1987.
2. P. J. Braspenning, F. Thuijsman, and A. J. M. M. Weijters, Artificial Neural Networks: An Introduction to ANN Theory and Practice, vol. 931, New York, NY, USA: Springer Science & Business Media, 1995.
3. L. Chua and L. Yang, "Cellular neural networks: Applications," IEEE Trans. Circuits Syst., vol. 35, no. 10, pp. 1273-1290, Oct. 1988.
4. M. Ueda, Y. Kaneko, Y. Nishitani, and E. Fujii, "A neural network circuit using persistent interfacial conducting heterostructures," J. Appl. Phys., vol. 110, no. 8 pp. 086104-1-086104-3, Oct. 2011.
5. P. Y. Simard, D. Steinkraus, and J. C. Platt, "Best practices for convolutional neural networks applied to visual document analysis," in Proc. 7th Int. Conf. Document Anal Recog., Edinburgh, U.K., Aug. 2003. pp. 958-958.
6. D. George and J. Hawkins, "Towards a mathematical theory of cortical micro-circuits," PLoS Comput. Biol., vol. 5, no. 10, pp. 1-26, Oct. 2009.
7. R. Dlugosz, T. Talaska, and W. Pedrycz, "Current-mode analog adaptive mechanism for ultra-low-power neural networks," IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 58, no. 1 pp. 31-35, Jan. 2011.
8. A. Bermak, "A highly scalable 3D chip for binary neural network classification applications," in Proc. Int. Symp. Circuits Syst.,Bangkok,Thailand, May 2003, pp. V-685-V-688.
9. S. Fukami, M. Yamanouchi, K. J. Kim, T. Suzuki, N. Sakimura, D. Chiba, S. Ikeda et al., "20-nm magnetic domain wall motion memory with ultralow-power operation," in Proc. IEEE Int. Electron. Devices Meet., Washington, DC, USA, Dec. 2013, pp. 3.5.1-3.5.4.
10. D. Ngo, K. Ikeda, and H. Awano, "Direct observation of domain wall motion induced by low-current density in TbFeCo wires," Appl. Phys. Exp., vol. 4, no. 9, pp. 093002-1-093002-3, Sep. 2011.
11. C. Lim, T. Devolder, C. Chappert, J. Grollier, V. Cros, A. Vaurés, A. Fert, and G. Faini, "Domain wall displacement induced by subnanosecond pulsed current," Appl. Phys. Lett., vol. 84, no. 15, pp. 2820-2822, Apr. 2004.
12. A. Chanthbouala, R. Matsumoto, J. Grollier, V. Cros, A. Anane, A. Fert, A. V. Khvalkovskiy et al., "Vertical-current-induced domain-wall motion in MgO-based magnetic tunnel junctions with low current densities," Nature Phy., vol. 7, no. 8, pp. 626-630, Apr. 2011.
13. M. Sharad, C. Augustine, G. Panagopoulos, and K. Roy, "Spin-based neuron model with domain-wall magnets as synapse," IEEE Trans. Nanotechnol., vol. 11, no. 4, pp. 843-853, Jun. 2012
14. M. Sharad, D. Fan, K. Aitken, and K. Roy, "Energy-efficient non-boolean computing with spin neurons and resistive memory," IEEE Tran. Nanotechnol., vol. 13, no. 1, pp. 23-34, Jan. 2014.
15. M. Sharad, D. Fan, and K. Roy, "Spin-neurons: a possible path to energy-efficient neuromorphic computers," J. Appl. Phys., vol. 114, no. 23, pp. 234906-1-234906-6, Dec. 2013.
16. A. Vansteenkiste, J. Leliaert, M. Dvornik, M. Helsen, F. Garcia-Sanchez, and B. V. Waeyenberge, "The Design and Verification of MuMax3," J. Appl. Phys., vol. 4, no. 10, pp. 107133-1-107133-22, Oct. 2014.
17. (2015). [Online]. Available: http://www.mathworks.com/products/neuralnetwork/
18. X. Fong, S. K. Gupta, N. N. Mojumder, S. H. Choday, C. Augustine, and K. Roy, "KNACK: A hybrid spin-charge mixed-mode simulator for evaluating different genres of spin-transfer torque MRAM bit-cells," in Proc. 16th Int. Conf. Simul. Semicond. Processes Devices, Osaka, Japan, Sep. 2011, pp. 51-54.
19. D. Morris, D. Bromberg, J. G. J. Zhu, and L. Pileggi, "mLogic: Ultra-low voltage non-volatile logic circuits using STT-MTJ devices," in Proc. 49th Annu. Des. Autom. Conf., San Francisco, CA, USA,, Jun. 2012, pp. 486-491.
20. S. Shigematsu, S. Mutoh, Y. Matsuya, Y. Tanabe, and J. Yamada, "A 1-V high-speed MTCMOS circuit scheme for power-down application circuits," IEEE J. Solid-State Circuits, vol. 32, no. 6, pp. 861-869, Jun. 1997.
21. X. Wang, Y. Chen, H. Xi, H. Li, and D. Dimitrov, "Spintronic memristor through spin-torque-induced magnetization motion," IEEE Electron, Device Lett., vol. 30, no. 3, pp. 294-297, Feb. 2009.
22. S. H. Jo, T. Chang, I. Ebong, B. B. Bhadviya, P. Mazumder, and W. Lu, "Nanoscale memristor device as synapse in neuromorphic systems," Nano lett., vol. 10, no. 4, pp. 1297-1301, Apr. 2010.
23. S. H. Jo, K. H. Kim, and W. Lu, "High-density crossbar arrays based on a Si memristive system," Nano Lett., vol. 9, no. 2, pp. 870-874, Feb. 2009.
24. R. Berdan, T. Prodromakis, and C. Toumazou, "High precision analogue memristor state tuning," Electron. Lett., vol. 48, no. 18, pp. 1105-1107, Aug. 2012.
25. H. Manem and G. S. Rose, "A read-monitored write circuit for 1T1M multi-level memristor memories," in Proc. IEEE Int. Symp. Circuits Syst., Rio de Janeiro, Brazil, May 2011, pp. 2938-2941.
26. K. H. Kim, S. Gaba, D. Wheeler, J. M. Cruz-Albrecht, T. Hussain, N. Srinivasa, and W. Lu, "A functional hybrid memristor crossbar-array/CMOS system for data storage and neuromorphic applications," Nano Lett., vol. 12, no. 1 pp. 389-395, Nov. 2011.
27. S. G. Ramasubramanian, R. Venkatesan, M. Sharad, K. Roy, and A. Raghunathan, "SPINDLE: SPINtronic deep learning engine for large-scale neuromorphic computing," in Proc. Int. Symp. Low Power Electron. Des., La Jolla, CA, USA, Aug. 2014, pp. 15-20.
28. W. Duch and N. Jankowski, "Survey of neural transfer functions," Neural Comput. Surveys, vol. 2, no. 1, pp. 163-212, 1999.
29. D. Fan, M. Sharad, A. Sengupta and K. Roy, "Hierarchical temporal memory based on spin-neurons and resistive memory for energy-efficient brain-inspired computing, Feb. 2014. URL: http://arxiv.org/abs/1402.2902 [cs.ET],"
30. D. Fan, M. Sharad, and K. Roy, "Design and synthesis of ultra low energy spin-memristor threshold logic," IEEE Trans. Nanotechnol., vol. 13, no. 3, pp. 574-583, May. 2014.
31. K. Roy, D. Fan, X. Fong, Y. Kim, M. Sharad, S. Paul, S. Chatterjee, S. Bhunia, and S. Mukhopadhyay, "Exploring spin transfer torque devices for unconventional computing," IEEE J. Emerging Sel. Topics Circuits Syst., vol. 5, no. 1, pp. 5-16, Mar. 2015.
32. T. Shibata, R. Zhang, S. P. Levitan, D. E. Nikonov, and G. I. Bourianoff, "CMOS supporting circuitries for nano-oscillator-based associative memories," in Proc. 13th Int. Workshop Cellular Nanoscale Netw. Their Appl., Turin, Italy, 2012, pp. 1-5.
33. A. Saberkari, E. Alarcón, and S. B. Shokouhi, "Fast transient current-steering CMOS LDO regulator based on current feedback amplifier," VLSI J. Integr., vol. 46, no. 2, pp. 165-171, Mar. 2013.
34. S. Fukami, T. Suzuki, N. Ohshima, K. Nagahara, and N. Ishiwata, "Micromagnetic analysis of current driven domain wall motion in nanostrips with perpendicular magnetic anisotropy," J. Appl. Phys., vol. 103, no. 7, pp. 07E718-1-07E718-3, Apr. 2008.
35. M. Kläui, P.-O. Jubert, R. Allenspach, A. Bischof, J. A. C. Bland, G. Faini, U. Rüdiger, C. A. F. Vaz, L. Vila, and C. Vouille, "Direct observation of domain-wall configurations transformed by spin currents," Phys. Rev. Lett., vol. 95, pp. 026601-1-026601-4, Jul. 2005.
36. Y. Togawa, T. Kimura, K. Harada, T. Akashi, T. Matsuda, A. Tonomura, and Y. Otan, "Current-excited magnetization dynamics in narrow ferromagnetic wires," Jpn. J. Appl. Phys., vol. 45, pp. L683-L685, Jul. 2006.
37. G. Meier, M. Bolte, R. Eiselt, B. Krüger, DH Kim, and P. Fischer, "Direct imaging of stochastic domain-wall motion driven by nanosecond current pulses," Phys. Rev. Lett., vol. 98, no. 18, pp. 187202-1-187202-4, May 2007.