Spin-based neuron model with domain-wall magnets as synapse

IEEE Transactions on Nanotechnology

Volumn 11, Issue 4, 2012, Pages 843-853

  Sharad, Mrigank ^a   Augustine, Charles ^b   Panagopoulos, Georgios ^a   Roy, Kaushik ^a  

^a PURDUE UNIVERSITY   (United States)

^b INTEL RESEARCH   (United States)

Author keywords

Hardware; low power; neural network; spin

Indexed keywords

BENCHMARK APPLICATIONS; CIRCUIT OPERATION; CMOS DESIGN; COMPUTATION POWER; HIGH INTEGRATION DENSITY; LOW POWER; LOW-POWER CONSUMPTION; LOWER-POWER CONSUMPTION; NANOMAGNETS; NEURON MODEL; PHYSICS-BASED MODELS; PROGRAMMABLE SYNAPSIS; SPIN; SPIN DEVICE; SPIN TORQUE; SUPPLY VOLTAGES; ULTRALOW VOLTAGE;

BENCHMARKING; CHARACTER RECOGNITION; COMPUTER HARDWARE; MAGNETS; NEURAL NETWORKS;

NEURONS;

EID: 84863749739     PISSN: 1536125X     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNANO.2012.2202125     Document Type: Article

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