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Volumn 58, Issue 1, 2011, Pages 31-35

Current-mode analog adaptive mechanism for ultra-low-power neural networks

Author keywords

Adaptive mechanism (ADM); analog memory (AM); current mode; hardware neural networks (NNs); leakage compensation

Indexed keywords

ADAPTIVE SYSTEMS; DELTA MODULATION; LOW POWER ELECTRONICS; SEMICONDUCTOR DEVICE MANUFACTURE; SIGNAL ANALYSIS; WIRELESS SENSOR NETWORKS;

EID: 79251486324     PISSN: 15497747     EISSN: 15583791     Source Type: Journal    
DOI: 10.1109/TCSII.2010.2092827     Document Type: Article
Times cited : (37)

References (22)
  • 1
    • 34547340410 scopus 로고    scopus 로고
    • A low voltage, high speed, high resolution class AB switched current sample and hold
    • Kos, Greece, May
    • O. Rajaee, A. Jahanian, and M. S. Bakhtiar, "A low voltage, high speed, high resolution class AB switched current sample and hold", in Proc. IEEE Int. Symp. Circuits Syst., Kos, Greece, May 2006, pp. 1039-1042.
    • (2006) Proc. IEEE Int. Symp. Circuits Syst. , pp. 1039-1042
    • Rajaee, O.1    Jahanian, A.2    Bakhtiar, M.S.3
  • 3
    • 8344242020 scopus 로고    scopus 로고
    • A 10-nW 12-bit accurate analog storage cell with 10-aA leakage
    • Nov
    • M. O'Halloran and R. Sarpeshkar, "A 10-nW 12-bit accurate analog storage cell with 10-aA leakage", IEEE J. Solid-State Circuits, vol. 39, no. 11, pp. 1985-1996, Nov. 2004.
    • (2004) IEEE J. Solid-state Circuits , vol.39 , Issue.11 , pp. 1985-1996
    • O'Halloran, M.1    Sarpeshkar, R.2
  • 4
    • 0037397836 scopus 로고    scopus 로고
    • A low-voltage low-power analog memory cell with built-in 4-quadrant multiplication
    • Signal Process., Apr
    • J. A. De Lima and A. S. Cordeiro, "A low-voltage low-power analog memory cell with built-in 4-quadrant multiplication", IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 50, no. 4, pp. 191-195, Apr. 2003.
    • (2003) IEEE Trans. Circuits Syst. II, Analog Digit , vol.50 , Issue.4 , pp. 191-195
    • De Lima, J.A.1    Cordeiro, A.S.2
  • 5
    • 33845865323 scopus 로고    scopus 로고
    • Robust neural network-based classification of premature ventricular contractions using wavelet transform and timing interval features
    • Dec
    • O. T. Inan, L. Giovangrandi, and G. T. A. Kovacs, "Robust neural network-based classification of premature ventricular contractions using wavelet transform and timing interval features", IEEE Trans. Biomed. Eng., vol. 53, no. 12, pp. 2507-2515, Dec. 2006.
    • (2006) IEEE Trans. Biomed. Eng. , vol.53 , Issue.12 , pp. 2507-2515
    • Inan, O.T.1    Giovangrandi, L.2    Kovacs, G.T.A.3
  • 6
    • 34547501148 scopus 로고    scopus 로고
    • Recognition of ECG patterns using artificial neural network
    • Jinan, China, Oct
    • L. He, W. Hou, X. Zhen, and C. Peng, "Recognition of ECG patterns using artificial neural network", in Proc. Int. Conf. Intell. Syst. Des. Appl., Jinan, China, Oct. 2006, vol. 2, pp. 477-481.
    • (2006) Proc. Int. Conf. Intell. Syst. Des. Appl. , vol.2 , pp. 477-481
    • He, L.1    Hou, W.2    Zhen, X.3    Peng, C.4
  • 7
    • 77953113958 scopus 로고    scopus 로고
    • Realization of the conscience mechanism in CMOS implementation of winner-takes-all selforganizing neural networks
    • Jun
    • R. Dlugosz, T. Talaska, W. Pedrycz, and R. Wojtyna, "Realization of the conscience mechanism in CMOS implementation of winner-takes-all selforganizing neural networks", IEEE Trans. Neural Netw., vol. 21, no. 6, pp. 961-971, Jun. 2010.
    • (2010) IEEE Trans. Neural. Netw. , vol.21 , Issue.6 , pp. 961-971
    • Dlugosz, R.1    Talaska, T.2    Pedrycz, W.3    Wojtyna, R.4
  • 8
    • 0027594068 scopus 로고
    • Analog implementation of a Kohonen map with on-chip learning
    • May
    • D. Macq, M. Verleysen, P. Jespers, and J.-D. Legat, "Analog implementation of a Kohonen map with on-chip learning", IEEE Trans. Neural Netw., vol. 4, no. 3, pp. 456-461, May 1993.
    • (1993) IEEE Trans. Neural. Netw. , vol.4 , Issue.3 , pp. 456-461
    • Macq, D.1    Verleysen, M.2    Jespers, P.3    Legat, J.-D.4
  • 9
    • 0031189909 scopus 로고    scopus 로고
    • Self-checking currentmode analogue memory
    • Jul
    • I. Baturone, S. Sanchez-Solano, and J. L. Huertas, "Self-checking currentmode analogue memory", Electron. Lett., vol. 33, no. 16, pp. 1349-1350, Jul. 1997.
    • (1997) Electron. Lett. , vol.33 , Issue.16 , pp. 1349-1350
    • Baturone, I.1    Sanchez-Solano, S.2    Huertas, J.L.3
  • 10
    • 72149119187 scopus 로고
    • A new analog implementation of the Kohonen neural network
    • Taipei, Taiwan
    • C.-Y. Wu and W.-K. Kuo, "A new analog implementation of the Kohonen neural network", in Proc. Int. Symp. VLSI Technol. Syst. Appl., Taipei, Taiwan, 1993, pp. 262-266.
    • (1993) Proc. Int. Symp. VLSI Technol. Syst. Appl. , pp. 262-266
    • Wu, C.-Y.1    Kuo, W.-K.2
  • 13
    • 0033683312 scopus 로고    scopus 로고
    • The extraction of transistor mismatch parameters: The CMOS current-steering D/A converter as a test structure
    • Geneva, Switzerland, May
    • A. Van den Bosch, M. Steyaert, and W. Sansen, "The extraction of transistor mismatch parameters: The CMOS current-steering D/A converter as a test structure", in Proc. IEEE Int. Symp. Circuits Syst., Geneva, Switzerland, May 2000, vol. 2, pp. 745-748.
    • (2000) Proc. IEEE Int. Symp. Circuits Syst. , vol.2 , pp. 745-748
    • Van Den Bosch, A.1    Steyaert, M.2    Sansen, W.3
  • 16
    • 0035007670 scopus 로고    scopus 로고
    • A switched-current sample and hold circuit for low frequency applications
    • Sydney, Australia, May
    • E. de Lira Mendes, P. Loumeau, and J.-F. Naviner, "A switched-current sample and hold circuit for low frequency applications", in Proc. IEEE Int. Symp. Circuits Syst., Sydney, Australia, May 2001, vol. 1, pp. 452-455.
    • (2001) Proc. IEEE Int. Symp. Circuits Syst. , vol.1 , pp. 452-455
    • De Lira Mendes, E.1    Loumeau, P.2    Naviner, J.-F.3
  • 18
    • 4644315677 scopus 로고    scopus 로고
    • A realization of a below-1-V operational and 30-MS/s sample-and-hold IC with a 56-dB signal-to-noise ratio by applying the current-based circuit approach
    • Jan
    • Y. Sugimoto, "A realization of a below-1-V operational and 30-MS/s sample-and-hold IC with a 56-dB signal-to-noise ratio by applying the current-based circuit approach", IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 51, no. 1, pp. 110-117, Jan. 2004.
    • (2004) IEEE Trans. Circuits Syst. I, Reg. Papers , vol.51 , Issue.1 , pp. 110-117
    • Sugimoto, Y.1
  • 19
    • 84887002637 scopus 로고    scopus 로고
    • Adaptive weights change mechanism for Kohonens's neural network implemented in CMOS 0.18 μm technology
    • Bruge, Belgium, Apr
    • T. Talaska, R. Dlugosz, and W. Pedrycz, "Adaptive weights change mechanism for Kohonens's neural network implemented in CMOS 0.18 μm technology", in Proc. ESANN, Bruge, Belgium, Apr. 2007, pp. 151-156.
    • (2007) Proc. ESANN , pp. 151-156
    • Talaska, T.1    Dlugosz, R.2    Pedrycz, W.3
  • 20
    • 0009633120 scopus 로고    scopus 로고
    • Analog technologies of all varieties dominate ISSCC
    • Feb
    • F. Goodenough, "Analog technologies of all varieties dominate ISSCC", Electron. Des., vol. 44, no. 4, pp. 96-111, Feb. 1996.
    • (1996) Electron. Des. , vol.44 , Issue.4 , pp. 96-111
    • Goodenough, F.1
  • 21
    • 0037741861 scopus 로고    scopus 로고
    • A new model for the current factor mismatch in the MOS transistor
    • Jul
    • R. Difrenza, P. Llinares, and G. Ghibaudo, "A new model for the current factor mismatch in the MOS transistor", Solid State Electron., vol. 47, no. 7, pp. 1167-1171, Jul. 2003.
    • (2003) Solid State Electron. , vol.47 , Issue.7 , pp. 1167-1171
    • Difrenza, R.1    Llinares, P.2    Ghibaudo, G.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.