Design and synthesis of ultralow energy spin-memristor threshold logic

IEEE Transactions on Nanotechnology

Volumn 13, Issue 3, 2014, Pages 574-583

  Fan, Deliang ^a   Sharad, Mrigank ^a   Roy, Kaushik ^a  

^a Purdue University   (United States)

Author keywords

Boolean functions; magnetic domains; memristor; nanotechnology; programmable logic arrays; threshold logic (TL)

Indexed keywords

BOOLEAN FUNCTIONS; ENERGY EFFICIENCY; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); MAGNETIC DOMAINS; MEMRISTORS; NANOTECHNOLOGY; PASSIVE FILTERS;

MEMRISTOR; PROGRAMMABLE INTERCONNECT; PROGRAMMABLE LOGIC; PROGRAMMABLE LOGIC ARRAY; TERMINAL VOLTAGES; THRESHOLD DEVICES; THRESHOLD OPERATION; ULTRA-LOW POWER CONSUMPTION;

THRESHOLD LOGIC;

EID: 84900848671     PISSN: 1536125X     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNANO.2014.2312177     Document Type: Article

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