GaAs nanowires: From manipulation of defect formation to controllable electronic transport properties

ACS Nano

Volumn 7, Issue 10, 2013, Pages 9138-9146

  Han, Ning ^a   Hou, Jared J ^a   Wang, Fengyun ^a,b   Yip, Senpo ^a   Yen, Yu Ting ^c   Yang, Zai Xing ^a   Dong, Guofa ^a   Hung, Takfu ^a   Chueh, Yu Lun ^c   Ho, Johnny C ^a  

^a CITY UNIVERSITY OF HONG KONG   (Hong Kong)

^b QINGDAO UNIVERSITY   (China)

^c NATIONAL TSING HUA UNIVERSITY   (Taiwan)

Author keywords

CMOS inverters; crystal quality; defect formation; electronic transport; GaAs nanowires; two step growth

Indexed keywords

BINARY ALLOYS; CMOS INTEGRATED CIRCUITS; ELECTRONIC PROPERTIES; GALLIUM ALLOYS; GALLIUM ARSENIDE; GOLD ALLOYS; III-V SEMICONDUCTORS; NANOWIRES; QUALITY CONTROL; SEMICONDUCTING FILMS; SEMICONDUCTING GALLIUM; SUPERCONDUCTING FILMS; TRANSPORT PROPERTIES;

CMOS INVERTERS; CRYSTAL QUALITIES; DEFECT FORMATION; ELECTRONIC TRANSPORT; GAAS NANOWIRES; TWO-STEP GROWTH;

CRYSTAL DEFECTS;

EID: 84886995122     PISSN: 19360851     EISSN: 1936086X     Source Type: Journal    
DOI: 10.1021/nn403767j     Document Type: Article

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