40.4fJ/bit/mm low-swing on-chip signaling with self-resetting logic repeaters embedded within a mesh NoC in 45nm SOI CMOS

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2013, Pages 1637-1642

  Park, Sunghyun ^a   Qazi, Masood ^b   Peh, Li Shiuan ^a   Chandrakasan, Anantha P ^a  

^a MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

^b CYPRESS SEMICONDUCTOR   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; CMOS INTEGRATED CIRCUITS; COMPUTER CIRCUITS; ENERGY EFFICIENCY; MESH GENERATION; SIGNALING;

BANDWIDTH REQUIREMENT; CIRCUIT TECHNIQUES; DESIGN CHALLENGES; HIGH ENERGY EFFICIENCY; HIGHPERFORMANCE; LOW-SWING SIGNALING; ON-CHIP SIGNALING; PROCESS VARIATION;

NETWORK-ON-CHIP;

EID: 84881115395     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.7873/date.2013.332     Document Type: Conference Paper

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