Analysis of single-trap-induced random telegraph noise on FinFET devices, 6T SRAM cell, and logic circuits

IEEE Transactions on Electron Devices

Volumn 59, Issue 8, 2012, Pages 2227-2234

  Fan, Ming Long ^a,b   Hu, Vita Pi Ho ^a,b   Chen, Yin Nien ^a,b   Su, Pin ^a,b   Chuang, Ching Te ^a,b  

^a IEEE   (Taiwan)

^b NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

FinFET; Logic circuits; Random telegraph noise (RTN); Static random access memory (SRAM)

Indexed keywords

CELLS; COMPUTER AIDED LOGIC DESIGN; CYTOLOGY; DELAY CIRCUITS; DISPERSIONS; ELECTRONIC DESIGN AUTOMATION; FINFET; LOGIC CIRCUITS; MOSFET DEVICES; RANDOM ACCESS STORAGE; STATIC RANDOM ACCESS STORAGE; TELEGRAPH; TIMING CIRCUITS;

AMPLITUDE DISPERSION; DISCRETE RANDOM DOPANTS; MIXED MODE SIMULATION; OPERATING TEMPERATURE; RANDOM TELEGRAPH NOISE; STATIC NOISE MARGIN; STATIC RANDOM ACCESS MEMORY; TRAPPING/DETRAPPING;

COMPUTER CIRCUITS;

EID: 84862605185     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2012.2200686     Document Type: Article

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