Grain-orientation induced work function variation in nanoscale metal-gate transistors - Part II: Implications for process, device, and circuit design

IEEE Transactions on Electron Devices

Volumn 57, Issue 10, 2010, Pages 2515-2525

  Dadgour, Hamed F ^a   Endo, Kazuhiko ^b   De, Vivek K ^c   Banerjee, Kaustav ^a  

^a University of California   (United States)

^b NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY AIST   (Japan)

^c INTEL CORPORATION   (United States)

Author keywords

Grain orientation; metal gate devices; random variations; reliability; subthreshold leakage; threshold voltage; VLSI design; work function variation (WFV)

Indexed keywords

GRAIN ORIENTATION; METAL-GATE; RANDOM VARIATION; SUBTHRESHOLD LEAKAGE; VLSI DESIGN; WORK FUNCTION VARIATION (WFV);

DESIGN; INTEGRATED CIRCUIT MANUFACTURE; MATHEMATICAL MODELS; MOS DEVICES; RELIABILITY; STATIC RANDOM ACCESS STORAGE; TANTALUM COMPOUNDS; THRESHOLD VOLTAGE; TITANIUM NITRIDE; VLSI CIRCUITS; WORK FUNCTION;

METALS;

EID: 77957016115     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2010.2063270     Document Type: Article

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