A 130 nm 1.2 V/3.3 v 16 Kb spin-transfer torque random access memory with nondestructive self-reference sensing scheme

IEEE Journal of Solid-State Circuits

Volumn 47, Issue 2, 2012, Pages 560-573

  Chen, Yiran ^a   Li, Hai ^b   Wang, Xiaobin ^c   Zhu, Wenzhong ^c   Xu, Wei ^d   Zhang, Tong ^d  

^a University of Pittsburgh   (United States)

^b POLYTECHNIC UNIVERSITY   (United States)

^c SEAGATE TECHNOLOGY   (United States)

^d RENSSELAER POLYTECHNIC INSTITUTE   (United States)

Author keywords

MRAM; self reference sensing scheme; Spin torque; STT RAM

Indexed keywords

CELL CURRENT; CMOS PROCESSS; FAILURE RATE; LOW-RESISTANCE STATE; MAGNETIC TUNNELING JUNCTIONS; MEASUREMENT RESULTS; MEMORY BITS; MRAM; NON DESTRUCTIVE; NONVOLATILITY; PROCESS VARIATION; RANDOM ACCESS MEMORIES; SCALED TECHNOLOGIES; SELF-REFERENCES; SENSING PROCESS; SENSING SCHEMES; SENSING TECHNIQUES; SPIN TORQUE; SPIN TRANSFER TORQUE; STT-RAM; TEST CHIPS;

CMOS INTEGRATED CIRCUITS; MAGNETIC DEVICES; MRAM DEVICES; SENSORS;

RANDOM ACCESS STORAGE;

EID: 84856500343     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2011.2170778     Document Type: Article

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