A novel voltage sensing 1T/2MTJ cell with resistance ratio for highly stable and scalable MRAM

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn 2005, Issue , 2005, Pages 170-171

  Aoki, Masaki ^a   Iwasa, Hiroshi ^a   Sato, Yoshihiro ^a  

^a FUJITSU LABORATORIES LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC POTENTIAL; ELECTRIC RESISTANCE; TRANSISTORS; TUNNEL JUNCTIONS;

BIT LINE ARCHITECTURE; MAGNETIC TUNNEL JUNCTIONS; MRAM CELL;

RANDOM ACCESS STORAGE;

EID: 33745137880     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSIC.2005.1469359     Document Type: Conference Paper

References (4)

1. J.Nahas, et al., ISSCC Tech. Dig., pp.44-45, 2004.
2. A.Bette, et al., Symp. on VLSI Circuits Dig., pp.217-220, 2003.
3. T.Tsuji, et al., Symp. on VLSI Circuits Dig., pp.450-453, 2004.
4. Star-HSPICE Manual Volume IV, Release 2000.2 Avant!, INC.