Impact of well structure on single-event well potential modulation in bulk CMOS

IEEE Transactions on Nuclear Science

Volumn 58, Issue 6 PART 1, 2011, Pages 2614-2620

  Gaspard, Nelson J ^a   Witulski, Arthur F ^a   Atkinson, Nicholas M ^a   Ahlbin, Jonathan R ^a   Holman, W Timothy ^a   Bhuva, Bharat L ^a   Loveless, T Daniel ^a   Massengill, Lloyd W ^a  

^a VANDERBILT UNIVERSITY   (United States)

Author keywords

Charge sharing; single event; well potential collapse; well potential modulation

Indexed keywords

BULK CMOS; CHARGE COLLECTION; CHARGE SHARING; ION ENERGIES; PARASITIC BIPOLAR TRANSISTORS; PROCESS PARAMETERS; SINGLE EVENT; SINGLE-EVENTS; SPATIAL CHARACTERISTICS; TCAD SIMULATION; WELL STRUCTURE;

BIPOLAR TRANSISTORS; CMOS INTEGRATED CIRCUITS;

MODULATION;

EID: 83855165155     PISSN: 00189499     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNS.2011.2171366     Document Type: Conference Paper

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