Velocity and mobility investigation in 1-nm-EOT HfSiON on Si (110) and (100)-does the dielectric quality matter?

IEEE Transactions on Electron Devices

Volumn 56, Issue 12, 2009, Pages 3009-3017

  Trojman, Lionel ^a,b,c   Pantisano, Luigi ^a   Dehan, Morin ^a   Ferain, Isabelle ^a,b   Severi, Simone ^a   Maes, Herman E ^a,b   Groeseneken, Guido ^a,b  

^a IMEC   (Belgium)

^b Katholieke Universiteit Leuven   (Belgium)

^c UNIVERSIDAD SAN FRANCISCO DE QUITO   (Ecuador)

Author keywords

(110) substrate orientation; 1 nm EOT; Cryogenic temperature; High MG MOSFET; High field transport; Saturation velocity; Short channel devices

Indexed keywords

1-NM EOT; CRYOGENIC TEMPERATURES; HIGH FIELD TRANSPORT; MOS-FET; SATURATION VELOCITY; SHORT-CHANNEL DEVICES; SUBSTRATE ORIENTATION;

CRYOGENICS; HAFNIUM COMPOUNDS; MOSFET DEVICES;

SILICON;

EID: 79959425232     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2009.2032280     Document Type: Article

References (39)

1. G. D. Wilk, R. M. Wallace, and J. M. Anthony, "High-? gate dielectrics: Current status and materials properties considerations," J. Appl. Phys., vol. 89, no. 10, pp. 5243-5275, May 2001.
2. S.-I. Saito, Y. Shimamoto, K. Torii, Y. Manabe, M. Caymax, J. W. Maes, M. Hiratani, and S.-I. Kimura, "Mobility reduction due to remote charge scattering in Al2O3/SiO2 gate-stacked MISFETs," in Proc. Solid State Devices Meeting, Nagoya, Japan, 2002, pp. 704-705.
3. L.-A. Ragnarsson, L. Pantisano, V. Kaushik, S.-I. Saito, Y. Shimamoto, S. De Gendt, and M. Heyns, "The impact of sub monolayer of HfO2 on the device performance of high-? based transistors," in IEDM Tech. Dig., Washington, DC, 2003, pp. 87-90.
4. J. Mitard, B. DeJaeger, F. Leys, G. Helling, K. Martens, G. Eeneman, D. Brunco, R. Loo, D. Shamiryan, T. Vanderweys, G. Winderinckx, K. De Meyer, M. Caymax, L. Pantisano, M. Meuris, and M. Heyns, "Record ION/IOFF performance for 65 nm p-MOSFET and novel Si passivation scheme for improved EOT scalability," in IEDM Tech. Dig., San Francisco, CA, 2008, pp. 873-876.
5. M. Yang, V. W. C. Chan, K. K. Chan, L. Shi, D. M. Fried, J. H. Stathis, A. I. Chou, E. Gusev, J. A. Ott, L. E. Burns, M. V. Fischetti, and M. Ieong, "Hybrid-orientation technology (HOT): Opportunities and challenges," IEEE Trans. Electron Devices, vol. 53, no. 5, pp. 965-978, May 2006.
6. L. Trojman, L. Pantisano, I. Ferain, S. Severi, H. Maes, and G. Groeseneken, "Mobility and dielectric quality of 1-nm EOT HfSiON on Si(110) and (100)," IEEE Trans. Electron Devices, vol. 55, no. 12, pp. 3414-3420, Dec. 2008.
7. F. De Smedt, C. Vinckier, I. Cornelissen, S. De Gendt, and M. Heyns, "A detailed study on the growth of thin oxide layers on silicon using ozonated solutions," J. Electrochem. Soc., vol. 147, no. 3, pp. 1124-1129, Mar. 2000.
8. I. Ferain, L. Pantisano, A. Kottantharayil, J. Petry, L. Trojman, N. Collaert, M. Jurczak, and K. De Meyer, "Reduction of the anomalous VT behavior in MOSFETs with high-?/metal gate stacks," Microelectron. Eng., vol. 84, no. 9/10, pp. 1882-1886, Sep./Oct. 2007.
9. S. Severi, L. Pantisano, E. Augendre, E. S. Andrés, P. Eyben, and K. De Meyer, "A reliable metric for mobility extraction of short-channel MOSFETs," IEEE Trans. Electron Devices, vol. 54, no. 10, pp. 2690-2698, Oct. 2007.
10. E. San Andrés, L. Pantisano, J. Ramos, S. Severi, L. Trojman, S. De Gendt, and G. Groeseneken, "RF split capacitance voltage measurements of short-channel and leaky MOSFET devices," IEEE Electron Device Lett., vol. 27, no. 9, pp. 772-774, Sep. 2006.
11. S. Datta, F. Assad, and M. S. Lundstrom, "The silicon MOSFET from a transmission viewpoint," Superlattices Microstruct., vol. 23, no. 3/4, pp. 771-780, Mar. 1998.
12. G. G. Shahidi, D. A. Antoniadis, and H. I. Smith, "Electron velocity overshoot at room and liquid nitrogen temperatures in silicon inversion layers," IEEE Electron Device Lett., vol. 9, no. 2, pp. 94-96, Feb. 1988.
13. B. Yang, A. Waite, H. Yin, J. Yu, L. Black, D. Chidambarrao, A. Domenicucci, X. Wang, S. H. Ku, Y. Wang, H. V. Meer, B. Kim, H. Nayfeh, S. D. Kim, K. Tabakman, R. Pal, K. Nummy, B. Greene, P. Fisher, J. Liu, Q. Liang, J. Holt, S. Narasimha, Z. Luo, H. Utomo, X. Chen, D. Park, C. Y. Sung, R. Wachnik, G. Freeman, D. Schepis, E. Maciejewski, M. Khare, E. Leobandung, S. Luning, and P. Agnello, "(110) channel, SiON gate-dielectric PMOS with record high Ion = 1 mA/μm through channel stress and source drain external resistance (Rext) engineering," in IEDM Tech. Dig., Washington, DC, 2007, pp. 151-154.
14. L. Pantisano, L. Trojman, S. Severi, G. Curatola, G. Crupi, A. De Keersegieter, T. Hoffmann, and G. Groeseneken, "Direct mobility and velocity extraction using a split RFCV technique at high VDS in 40 nm MOSFET," IEEE Trans. Electron Device, submitted for publication.
15. M. Saitoh and K. Uchida, "Universal relationship between low-field mobility and high-field carrier velocity in high-? and SiO2 gate dielectric MOSFETs," in IEDM Tech. Dig., San Francisco, CA, 2006, pp. 1-3.
16. R. Ohba and T. Mizuno, "Nonstationary electron/hole transport in sub-0.1 μm MOS devices: Correlation with mobility and low-power CMOS application," IEEE Trans. Electron Devices, vol. 48, no. 2, pp. 338-343, Feb. 2001.
17. E. J. Ryder and W. Shockley, "Mobility of electrons in high fields," Phys. Rev., vol. 81, no. 1, pp. 139-140, 1951.
18. C. Jacoboni, C. Canali, G. Ottoviani, and A. Albergigi-Quaranta, "A review of some charge transport properties of silicon," Solid State Electron., vol. 20, no. 2, pp. 77-89, Feb. 1977.
19. A. Kinoshita, T. Kinoshita, Y. Nishi, K. Uchida, S. Toriyama, R. Hasumi, and J. Koga, "Comprehensive study on injection velocity enhancement in dopant-segregated Schottky MOSFETs," in IEDM Tech. Dig., San Francisco, CA, 2006, pp. 1-4.
20. C. B. Norris and J. F. Gibbons, "Measurement of high-field carrier drift velocities in silicon by a time-of-flight technique," IEEE Trans. Electron Devices, vol. ED-14, no. 1, pp. 38-43, Jan. 1967.
21. C. Canali, C. Jacobini, F. Nava, G. Ottoviani, and A. Albergigi-Quaranta, "Electron velocity in silicon," Phys. Rev. B, Condens. Matter, vol. 12, no. 4, pp. 2265-2284, 1975.
22. G. Ottoviani, L. Reggiani, C. Canali, F. Nava, and A. Albergigi-Quaranta, "Hole drift velocity in silicon," Phys. Rev. B, Condens. Matter, vol. 12, no. 8, pp. 3318-3329, Oct. 1975.
23. F. M. Bufler and A. Erlebach, "Monte Carlo simulation of the performance dependence on surface and channel orientation in scaled pFinFETs," in Proc. ESSDERC, Montreux, Switzerland, Sep. 2006, pp. 174-177.
24. M. V. Fischetti, Z. Ren, P. M. Solomon, M. Yang, and K. Rim, "Sixband k p calculation of the hole mobility in silicon inversion layers: Dependence on surface orientation, strain, and silicon thickness," J. Appl. Phys., vol. 94, no. 2, pp. 1079-1085, Jul. 2003.
25. B. Mereu, C. Rossel, E. P. Gusev, and M. Yang, "The role of Si orientation and temperature on the carrier mobility in metal oxide semiconductor field-effect transistors with ultrathin HfO2 gate dielectrics," J. Appl. Phys., vol. 100, no. 1, pp. 014 504-1-014 504-6, Jul. 2006.
26. B. Goebel, D. Schumann, and E. Bertagnolli, "Vertical N-channel MOSFETs for extremely high density memories: The impact of interface orientation on device performance," IEEE Trans. Electron Devices, vol. 48, no. 5, pp. 897-906, May 2001.
27. D. Colman, R. T. Bate, and J. P. Mize, "Mobility anisotropy and piezoelectric in Si p-type inversion layer," J. Appl. Phys., vol. 39, pp. 1923-1931, 1968.
28. W. G. Spitzer and H. Y. Fan, "Determination of optical constant and carrier effective mass of semiconductors," Phys. Rev., vol. 106, no. 5, pp. 882-890, Jun. 1957.
29. G. Sai-Halasz, M. R. Wordeman, D. P. Kern, S. Rishton, and E. Ganin, "High transconductance and velocity overshoot in NMOS devices at the 0.l-μm gate-length level," IEEE Electron Devices Lett., vol. 9, no. 9, pp. 464-466, Sep. 1988.
30. S.-I. Takagi, A. Toriumi, M. Iwase, and H. Tango, "On the universality of the inversion layer mobility in Si MOSFETs: Part I-Effects of substrate impurity concentration," IEEE Trans. Electron Devices, vol. 41, no. 12, pp. 2357-2362, Dec. 1994.
31. K. Masaki, K. Tanuguchi, C. Hamaguchi, and M. Iwase, "Temperature dependence of electron mobility in Si inversion layer," Jpn. J. Appl. Phys., vol. 30, no. 11A, pp. 2734-2739, 1991.
32. F. Assad, Z. Ren, D. Vasileska, S. Datta, and M. Lundstrom, "On the performance limits for Si MOSFETs: A theoretical study," IEEE Trans. Electron Devices, vol. 47, no. 1, pp. 232-240, Jan. 2000.
33. R. S. Huang and P. H. Ladbrooke, "The physics of excess electron velocity in sub-micronic FETs," J. Appl. Phys., vol. 48, no. 11, pp. 4791-4798, Nov. 1977.
34. A. Lochtefeld and D. A. Antoniadis, "On experimental determination of carrier velocity in deeply scaled NMOS: How close to the thermal limit?" IEEE Electron Device Lett., vol. 2, no. 2, pp. 95-97, Feb. 2001.
35. K. Natori, "Ballistic MOSFET reproduces current-voltage characteristics of an experimental device," IEEE Trans. Electron Devices, vol. 23, no. 11, pp. 655-657, Nov. 2002.
36. H. Tsuchiya and S.-I. Takagi, "Influence of elastic and inelastic phonon scattering on the drive current of quasi-ballistic MOSFETs," IEEE Trans. Electron Devices, vol. 55, no. 9, pp. 2397-2402, Sep. 2008.
37. K. Natori and T. Kurusu, "Nano-scale quasi-ballistic MOSFETs in reflection-transmission model," in Proc. Ext. Abstr. Int. Conf. Solid State Devices Mater., Tokyo, Japan, 2004, pp. 728-729.
38. G. Curatola, G. Doornbos, J. J. G. P. Loo, Y. V. Ponomarev, and G. Iannaccone, "Detailed modeling of sub-100-nm MOSFETs based on Schrodinger drift diffusion per subband and experiments and evaluation of the performance gap to ballistic transport," IEEE Trans. Electron Devices, vol. 52, no. 8, pp. 1851-1858, Aug. 2005.
39. L. Pantisano, L. Trojman, J. Mitard, B. DeJaeger, S. Severi, G. Crupi, T. Hoffmann, I. Ferain, M. Meuris, and M. Heyns, "Fundamentals and extraction of velocity saturation in sub-100 nm (110)-Si and (100)-Ge," in VLSI Symp. Tech. Dig., Honolulu, HI, 2008, pp. 52-53.