Defect gap states on III-V semiconductor-oxide interfaces (invited)

Microelectronic Engineering

Volumn 88, Issue 7, 2011, Pages 1440-1443

  Robertson, J ^a   Lin, L ^a  

^a UNIVERSITY OF CAMBRIDGE   (United Kingdom)

Author keywords

Calculation; FET; GaAs; Interface states; Oxide; Passivation

Indexed keywords

FERMI LEVEL PINNING; FET; GAAS; GAP STATE; HIGH-K OXIDES; INTERFACE STATES; INTERFACIAL DEFECT; SEMICONDUCTOR-OXIDE INTERFACE;

GADOLINIUM; GALLIUM ALLOYS; GALLIUM ARSENIDE; HAFNIUM OXIDES; MESFET DEVICES; PASSIVATION; SEMICONDUCTING GALLIUM;

DEFECTS;

EID: 79958070413     PISSN: 01679317     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.mee.2011.03.134     Document Type: Conference Paper

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