Screening of oxide/GaAs interfaces for MOSFET applications

IEEE Electron Device Letters

Volumn 29, Issue 11, 2008, Pages 1181-1183

  Passlack, M ^a,b   Droopad, R ^a,c   Yu, Z ^a   Medendorp, N ^d,e   Braddock, D ^f   Wang, X W ^g   Ma, T P ^g   Buyuklimanli T ^h  

^a FREESCALE SEMICONDUCTOR INC   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

^c TEXAS STATE UNIVERSITY   (United States)

^d MOTOROLA INC   (United States)

^e Arkansas Power Electronics International Inc   (United States)

^f OSEMI Corporation   (United States)

^g YALE UNIVERSITY   (United States)

^h EVANS ANALYTICAL GROUP   (United States)

Author keywords

III V MOSFET; III V semiconductor; Oxide semiconductor interface; Photoluminescence intensity (PL I)

Indexed keywords

GALLIUM ALLOYS; LIGHT EMISSION; MOSFET DEVICES; PHOTOLUMINESCENCE; SEMICONDUCTING GALLIUM;

APPLICATIONS.; CHANNEL MATERIALS; DEVICE QUALITIES; III-V MOSFET; III-V SEMICONDUCTOR; IN LINES; IN-SITU; MOS FETS; OXIDE/SEMICONDUCTOR INTERFACE; PHOTOLUMINESCENCE INTENSITIES; PHOTOLUMINESCENCE INTENSITY (PL-I); THEORETICAL MODELS;

LUMINESCENCE;

EID: 55149106555     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2008.2004569     Document Type: Article

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