Analog circuit reliability in sub-32 nanometer CMOS: Analysis and mitigation

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2011, Pages 1474-1479

  Gielen, Georges ^a   Maricau, Elie ^a   De Wit, Pieter ^a  

^a UNIVERSITY OF LEUVEN   (Belgium)

Author keywords

Aging; Design for Reliability; Failure Resilience; HBD; High k CMOS; Hot Carriers; NBTI; PBTI; SBD; TDDB

Indexed keywords

AGING; DESIGN FOR RELIABILITY; FAILURE-RESILIENCE; HBD; HIGH-K CMOS; NBTI; PBTI; SBD; TDDB;

COMPUTER SIMULATION; DESIGN; ELECTRIC FIELDS; ELECTRIC NETWORK ANALYSIS; INTEGRATED CIRCUIT MANUFACTURE; RELIABILITY ANALYSIS; SILICON COMPOUNDS; STOCHASTIC MODELS;

ANALOG CIRCUITS;

EID: 79957553113     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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