Mechanism of high-k dielectric-induced breakdown of the interfacial SiO2 layer

IEEE International Reliability Physics Symposium Proceedings

Volumn , Issue , 2010, Pages 373-378

  Bersuker, G ^a   Heh, D ^a   Young, C D ^a   Morassi, L ^b   Padovani, A ^b   Larcher, L ^b   Yew, K S ^c   Ong, Y C ^c   Ang, D S ^c   Pey, K L ^c   Taylor, W ^a  

^a SEMATECH   (United States)

^b UNIVERSITY OF MODENA AND REGGIO EMILIA   (Italy)

^c NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

Author keywords

Breakdown; High k dielectrics; Interfacial layer

Indexed keywords

BREAKDOWN; ELECTRICAL TESTS; EXPONENTIAL INCREASE; GATE TRANSISTORS; HIGH-K DIELECTRIC; INTERFACIAL LAYER; MECHANISM OF DEGRADATION; MODELING RESULTS; PHYSICAL ANALYSIS; PROGRESSIVE BREAKDOWN; TEMPERATURE DEPENDENCIES;

FILM GROWTH; GRAIN BOUNDARIES; GRAIN GROWTH; MODELS; OXYGEN; SILICON COMPOUNDS;

DIELECTRIC MATERIALS;

EID: 77957902314     PISSN: 15417026     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IRPS.2010.5488800     Document Type: Conference Paper

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