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Volumn , Issue , 2006, Pages 347-350

A 14-bit 200-MHz current-steering DAC with switching-sequence post-adjustment calibration

Author keywords

[No Author keywords available]

Indexed keywords

CALIBRATION; CMOS INTEGRATED CIRCUITS; ELECTRIC CURRENTS; FREQUENCY ESTIMATION; OPTICAL SWITCHES; RANDOM ERRORS;

EID: 34250886393     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASSCC.2006.357922     Document Type: Conference Paper
Times cited : (9)

References (7)
  • 1
    • 0033280679 scopus 로고    scopus 로고
    • 2 random walk CMOS DAC. Solid-State Circuits, IEEE Journal of, 34(12):1708-1718. December 1999.
    • 2 random walk CMOS DAC. Solid-State Circuits, IEEE Journal of, 34(12):1708-1718. December 1999.
  • 2
    • 0009492792 scopus 로고    scopus 로고
    • D/a conversion; amplitude and time error mapping optimization
    • 2
    • K. Doris, Chieh Lin, D. Leenaerts, and A. van Roermund. D/a conversion; amplitude and time error mapping optimization. In Proc. IEEE ICECS 2001, volume 2, pages 863-866 vol.2, 2001.
    • (2001) Proc. IEEE ICECS 2001 , vol.2 , pp. 863-866
    • Doris, K.1    Lin, C.2    Leenaerts, D.3    van Roermund, A.4
  • 4
    • 34250899041 scopus 로고    scopus 로고
    • Yonghua Cong and R.L. Geiger. A 1.5 V 14 b 100 MS/s self-calibrated DAC. In Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. 2003 IEEE International, pages 128-482, 2003.
    • Yonghua Cong and R.L. Geiger. A 1.5 V 14 b 100 MS/s self-calibrated DAC. In Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. 2003 IEEE International, pages 128-482, 2003.


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.