Emerging yield and reliability challenges in nanometer CMOS technologies

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2008, Pages 1322-1327

  Gielen, G ^a   De Wit, P ^a   Maricau, E ^a   Loeckx, J ^a   Martin Martinez J ^b,c   Kaczer, B ^b   Groeseneken, G ^a,b   Rodriguez R ^c   Nafria M ^c  

^a UNIVERSITY OF LEUVEN   (Belgium)

^b EVIEC Leuven   (Belgium)

^c UNIVERSITAT AUTÒNOMA DE BARCELONA   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; INDUSTRIAL ENGINEERING; TECHNOLOGY;

CMOS TECHNOLOGIES; PHYSICAL MECHANISMS; POSSIBLE SOLUTIONS; RELIABILITY CHALLENGES; TRANSISTOR PARAMETERS;

TESTING;

EID: 49749094341     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2008.4484862     Document Type: Conference Paper

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