메뉴 건너뛰기




Volumn 50, Issue 1, 2011, Pages

Source-drain engineering using atomically controlled heterojunctions for next-generation SiGe transistor applications

Author keywords

[No Author keywords available]

Indexed keywords

CONDUCTION CHANNEL; FERMI LEVEL PINNING; FERROMAGNETIC SPIN; HIGH QUALITY; KEY TECHNOLOGIES; LOW TEMPERATURE MOLECULAR BEAM EPITAXY; METAL-OXIDE-SEMICONDUCTOR FIELD-EFFECT TRANSISTOR; MOSFETS; SCHOTTKY; SCHOTTKY BARRIER HEIGHTS; SCHOTTKY CONTACTS; SI-BASED; SI/GE; SOURCE-DRAIN; SPIN-POLARIZED ELECTRONS; TUNNEL CONTACTS;

EID: 79951490385     PISSN: 00214922     EISSN: 13474065     Source Type: Journal    
DOI: 10.1143/JJAP.50.010101     Document Type: Article
Times cited : (46)

References (71)
  • 1
    • 79951480048 scopus 로고    scopus 로고
    • International Technology Roadmap for Semiconductors Edition
    • International Technology Roadmap for Semiconductors, 2009 Edition [http://www.itrs.net/reports.html].
    • (2009)


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.