Low-power clock trees for CPUs

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

Volumn , Issue , 2010, Pages 444-451

  Lee, Dong Jin ^a   Kim, Myung Chul ^a   Markov, Igor L ^a  

^a The Department of Civil and Environmental Engineering   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CLOCK DISTRIBUTION NETWORKS; COMPUTER AIDED DESIGN; ELECTRIC CLOCKS; FORESTRY; MULTIOBJECTIVE OPTIMIZATION; PROGRAM PROCESSORS;

CLOCK NETWORK; CLOCK NETWORK SYNTHESIS; LOW POWER CLOCK; MODELING AND OPTIMIZATION; MODELING TECHNIQUE; PARAMETER SPACES; POWER OPTIMIZATION; PROCESS VARIATION;

BUDGET CONTROL;

EID: 78650899036     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCAD.2010.5653738     Document Type: Conference Paper

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