Fast timing-model independent buffered clock-tree synthesis

Proceedings - Design Automation Conference

Volumn , Issue , 2010, Pages 80-85

  Shih, Xin Wei ^a   Chang, Yao Wen ^a  

^a NATIONAL TAIWAN UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

CHIP DESIGN; CLOCK SKEWS; CLOCK SOURCE; CLOCK TREE; CLOCK-TREE SYNTHESIS; COMMONLY USED; FAST TIMING; MODEL INDEPENDENT; RUNTIMES; SIMULATION RESULT; STRUCTURE OPTIMIZATION; SYMMETRICAL STRUCTURE; TIMING MODELS; TREE STRUCTURES; ULTRA-FAST; WIRE LENGTH;

COMPUTER AIDED DESIGN; COMPUTER SIMULATION; ELECTRIC CLOCKS; STRUCTURAL OPTIMIZATION; TIME MEASUREMENT; TREES (MATHEMATICS);

STRUCTURAL DESIGN;

EID: 77956198479     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1837274.1837296     Document Type: Conference Paper

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