A dual-MST approach for clock network synthesis

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn , Issue , 2010, Pages 467-473

  Lu, Jingwei ^a   Chow, Wing Kai ^a   Sham, Chiu Wing ^a   Young, Evangeline F Y ^b  

^a HONG KONG POLYTECHNIC UNIVERSITY   (Hong Kong)

^b CHINESE UNIVERSITY OF HONG KONG   (Hong Kong)

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER INSERTION; CLOCK NETWORK; CLOCK NETWORK SYNTHESIS; CLOCK SKEWS; GEOMETRIC MATCHING; NANO-METER-SCALE; NEGATIVE INFLUENCE; PERFORMANCE IMPROVEMENTS; PROCESS , VOLTAGE AND TEMPERATURES; PROCESS VARIATION; TOPOLOGY CONSTRUCTION; TOTAL PERFORMANCE; TREE STRUCTURES; VLSI PHYSICAL DESIGN;

COMPUTER AIDED DESIGN; DIGITAL INTEGRATED CIRCUITS; TREES (MATHEMATICS);

ELECTRIC CLOCKS;

EID: 77951220200     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASPDAC.2010.5419838     Document Type: Conference Paper

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