Energy-efficient fault tolerance in chip multiprocessors using critical value forwarding

Proceedings of the International Conference on Dependable Systems and Networks

Volumn , Issue , 2010, Pages 121-130

  Subramanyan, Pramod ^a   Singh, Virendra ^a   Saluja, Kewal K ^b   Larsson, Erik ^c  

^a INDIAN INSTITUTE OF SCIENCE   (India)

^b UNIVERSITY OF WISCONSIN MADISON   (United States)

^c LINKÖPING UNIVERSITY   (Sweden)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS SCALING; CRITICAL VALUE; DESIGN TOLERANCES; ENERGY CONSUMPTION; ENERGY EFFICIENT; FAULT-TOLERANT; IN-CHIP; ON CHIPS; PERMANENT FAULTS; TRANSIENT FAULTS;

ENERGY UTILIZATION; FAULT TOLERANCE; FAULT TOLERANT COMPUTER SYSTEMS; FITS AND TOLERANCES; MICROPROCESSOR CHIPS;

QUALITY ASSURANCE;

EID: 77956573875     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DSN.2010.5544918     Document Type: Conference Paper

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