-
3
-
-
0038665264
-
Bottom-up approach for carbon nanotube interconnects
-
Apr.
-
J. Li, Q. Ye, A. Cassell, H. T. Ng, R. Stevens, J. Han, and M. Meyyappan, "Bottom-up approach for carbon nanotube interconnects," Appl. Phys. Lett., vol. 82, no. 15, pp. 2491-2493, Apr. 2003.
-
(2003)
Appl. Phys. Lett.
, vol.82
, Issue.15
, pp. 2491-2493
-
-
Li, J.1
Ye, Q.2
Cassell, A.3
Ng, H.T.4
Stevens, R.5
Han, J.6
Meyyappan, M.7
-
4
-
-
0003790413
-
-
New York: Springer
-
M. S. Dresselhaus, G. Dresselhaus, and A. Jorio, Carbon Nanotubes: Synthesis, Structure, Properties, and Applications. New York: Springer, 2001.
-
(2001)
Carbon Nanotubes: Synthesis, Structure, Properties, and Applications
-
-
Dresselhaus, M.S.1
Dresselhaus, G.2
Jorio, A.3
-
5
-
-
2342466950
-
Luttinger liquid theory as a model of the gigahertz electrical properties of carbon nanotubes
-
Sep.
-
P. J. Burke, "Luttinger liquid theory as a model of the gigahertz electrical properties of carbon nanotubes," Trans. NANO, vol. 1, no. 3, pp. 129-144, Sep. 2002.
-
(2002)
Trans. NANO
, vol.1
, Issue.3
, pp. 129-144
-
-
Burke, P.J.1
-
6
-
-
31344449874
-
Modeling of metallic carbon nanotube interconnects for circuit simulation and a comparison with Cu interconnects for scaled technologies
-
Jan.
-
A. Raychowdhury and K. Roy, "Modeling of metallic carbon nanotube interconnects for circuit simulation and a comparison with Cu interconnects for scaled technologies," IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst., vol. 25, no. 1, pp. 1361-1364, Jan. 2006.
-
(2006)
IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.
, vol.25
, Issue.1
, pp. 1361-1364
-
-
Raychowdhury, A.1
Roy, K.2
-
7
-
-
33846098642
-
Design and performance modeling for single-walled carbon nanotubes as local, semiglobal, and global interconnects in gigascale integrated systems
-
Jan.
-
A. Naeemi and J. D. Meindl, "Design and performance modeling for single-walled carbon nanotubes as local, semiglobal, and global interconnects in gigascale integrated systems," IEEE Trans. Electron Device Lett., vol. 54, no. 1, pp. 26-37, Jan. 2007.
-
(2007)
IEEE Trans. Electron Device Lett.
, vol.54
, Issue.1
, pp. 26-37
-
-
Naeemi, A.1
Meindl, J.D.2
-
8
-
-
33646248381
-
Compact physical models for multiwall carbon-nanotube interconnects
-
May
-
A. Neaeemi and J. D. Meindl, "Compact physical models for multiwall carbon-nanotube interconnects," IEEE Trans. Electron Device Lett., vol. 27, no. 5, pp. 338-340, May 2006.
-
(2006)
IEEE Trans. Electron Device Lett.
, vol.27
, Issue.5
, pp. 338-340
-
-
Neaeemi, A.1
Meindl, J.D.2
-
9
-
-
34547819761
-
Analyzing conductance of mixed carbon-nanotube bundles for interconnect applications
-
Aug.
-
S. Haruehanroengra and W. Wang, "Analyzing conductance of mixed carbon-nanotube bundles for interconnect applications," IEEE Trans. Electron Device Lett., vol. 28, no. 8, pp. 756-759, Aug. 2007.
-
(2007)
IEEE Trans. Electron Device Lett.
, vol.28
, Issue.8
, pp. 756-759
-
-
Haruehanroengra, S.1
Wang, W.2
-
10
-
-
33748630936
-
Performance analysis of carbon nanotube interconnects for VLSI applications
-
N. Srivastava and K. Banerjee, "Performance analysis of carbon nanotube interconnects for VLSI applications," in Proc. ICCAD, 2005, pp. 383-390.
-
(2005)
Proc. ICCAD
, pp. 383-390
-
-
Srivastava, N.1
Banerjee, K.2
-
11
-
-
44949265454
-
Modeling and performance analysis of multi-walled carbon nanotube interconnects
-
Jun.
-
H. Li, W.-Y. Yin, K. Banerjee, and J.-F. MaoCircuit, "Modeling and performance analysis of multi-walled carbon nanotube interconnects," IEEE Trans. Electron Devices, vol. 55, no. 6, pp. 1328-1337, Jun. 2008.
-
(2008)
IEEE Trans. Electron Devices
, vol.55
, Issue.6
, pp. 1328-1337
-
-
Li, H.1
Yin, W.-Y.2
Banerjee, K.3
Maocircuit, J.-F.4
-
12
-
-
49749095673
-
Investigating the design, performance, and reliability of multi-walled carbon nanotube interconnect
-
A. Niewoudt and Y. Massoud, "Investigating the design, performance, and reliability of multi-walled carbon nanotube interconnect," in Proc. ISQED, 2008, pp. 691-696.
-
(2008)
Proc. ISQED
, pp. 691-696
-
-
Niewoudt, A.1
Massoud, Y.2
-
13
-
-
34447121993
-
Inductance of mixed carbon nanotube bundles
-
Jun.
-
W. Wang, S. Haruehanroengra, L. Shang, and M. Liu, "Inductance of mixed carbon nanotube bundles," Micro & Nano Lett., IET, vol. 2, no. 2, pp. 35-39, Jun. 2007.
-
(2007)
Micro & Nano Lett., IET
, vol.2
, Issue.2
, pp. 35-39
-
-
Wang, W.1
Haruehanroengra, S.2
Shang, L.3
Liu, M.4
-
14
-
-
33947245130
-
Modeling crosstalk effects in CNT bus architectures
-
Mar.
-
D. Rossi, J. M. Cazeaux, C. Metra, and F. Lombardi, "Modeling crosstalk effects in CNT bus architectures," IEEE Trans. Nanotechnol., vol. 6, no. 2, pp. 133-145, Mar. 2007.
-
(2007)
IEEE Trans. Nanotechnol.
, vol.6
, Issue.2
, pp. 133-145
-
-
Rossi, D.1
Cazeaux, J.M.2
Metra, C.3
Lombardi, F.4
-
15
-
-
55349097496
-
Current status and future perspectives of carbon nanotube interconnects
-
K. Banerjee, H. Li, and N. Srivastava, "Current status and future perspectives of carbon nanotube interconnects," in Proc. NANO, 2008, pp. 432-436.
-
(2008)
Proc. NANO
, pp. 432-436
-
-
Banerjee, K.1
Li, H.2
Srivastava, N.3
-
16
-
-
34748917552
-
Modeling of the performance of carbon nanotube bundle, cu/low-k and optical on-chip global interconnects
-
H. Cho, K-H. Koo, P. Kapur, and K. C. Saraswat, "Modeling of the performance of carbon nanotube bundle, cu/low-k and optical on-chip global interconnects," in Proc. SLIP, 2007, pp. 81-88.
-
(2007)
Proc. SLIP
, pp. 81-88
-
-
Cho, H.1
Koo, K.-H.2
Kapur, P.3
Saraswat, K.C.4
-
17
-
-
0034848826
-
Inductance 101: Modeling and extraction
-
M. W. Beattie and L. T. Pileggi, "Inductance 101: Modeling and extraction," in Proc. DAC, 2001, pp. 323-328.
-
(2001)
Proc. DAC
, pp. 323-328
-
-
Beattie, M.W.1
Pileggi, L.T.2
-
19
-
-
25944438622
-
Electrical-resistivity model for polycrystalline films: The case of arbitrary reflection at external surfaces
-
A. F. Mayadas and M. Shatzkes, "Electrical-resistivity model for polycrystalline films: The case of arbitrary reflection at external surfaces," Phys. Rev. B, vol. 1, no. 4, pp. 1382-1389, 1970.
-
(1970)
Phys. Rev. B
, vol.1
, Issue.4
, pp. 1382-1389
-
-
Mayadas, A.F.1
Shatzkes, M.2
-
20
-
-
84933207793
-
The mean free path of electrons in metals
-
E. H. Sondheimer, "The mean free path of electrons in metals," Adv. Phys., vol. 1, no. 1, pp. 499-537, 1952.
-
(1952)
Adv. Phys.
, vol.1
, Issue.1
, pp. 499-537
-
-
Sondheimer, E.H.1
-
21
-
-
0033891230
-
Effects of inductance on the propagation delay and repeater insertion in VLSI circuits
-
Apr.
-
Y. I. Ismail and E. G. Friedman, "Effects of inductance on the propagation delay and repeater insertion in VLSI circuits," IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 8, no. 2, pp. 195-206, Apr. 2000.
-
(2000)
IEEE Trans. Very Large Scale Integr. (VLSI) Syst.
, vol.8
, Issue.2
, pp. 195-206
-
-
Ismail, Y.I.1
Friedman, E.G.2
-
22
-
-
0038714099
-
Optimum wire sizing of RLC interconnect with repeaters
-
M. A. El-Moursy and E. G. Friedman, "Optimum wire sizing of RLC interconnect with repeaters," in Proc. GLSVLSI, 2003, pp. 27-32.
-
(2003)
Proc. GLSVLSI
, pp. 27-32
-
-
El-Moursy, M.A.1
Friedman, E.G.2
-
23
-
-
0002375353
-
The SPLASH-2 programs: Characterization and methodological considerations
-
S. C. Woo, M. Ohara, E. Torrie, J. P. Singh, and A. Gupta, "The SPLASH-2 programs: Characterization and methodological considerations," in Proc. ISCAS, 1995, pp. 1-13.
-
(1995)
Proc. ISCAS
, pp. 1-13
-
-
Woo, S.C.1
Ohara, M.2
Torrie, E.3
Singh, J.P.4
Gupta, A.5
-
24
-
-
77956227780
-
-
Open SystemC Initiative (OSCI), [Online]. Available
-
Open SystemC Initiative (OSCI), "SystemC Initiative," [Online]. Available: www.systemc.org
-
SystemC Initiative
-
-
-
25
-
-
4444364133
-
Extending the transaction level modeling approach for fast communication architecture exploration
-
S. Pasricha, N. Dutt, and M. Ben-Romdhane, "Extending the transaction level modeling approach for fast communication architecture exploration," in Proc. DAC, 2004, pp. 113-118.
-
(2004)
Proc. DAC
, pp. 113-118
-
-
Pasricha, S.1
Dutt, N.2
Ben-Romdhane, M.3
-
26
-
-
0742321357
-
Fixed-outline floorplanning: Enabling hierarchical design
-
Dec.
-
S. N. Adya and I. L. Markov, "Fixed-outline floorplanning: Enabling hierarchical design," IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 11, no. 6, pp. 1120-1135, Dec. 2003.
-
(2003)
IEEE Trans. Very Large Scale Integr. (VLSI) Syst.
, vol.11
, Issue.6
, pp. 1120-1135
-
-
Adya, S.N.1
Markov, I.L.2
-
27
-
-
1842482487
-
Can we achieve ultra-low resistivity in carbon nanotube-based metal composites?
-
O. Hjortstam, P. Isberg, S. Söderholm, and H. Dai, "Can we achieve ultra-low resistivity in carbon nanotube-based metal composites?," App. Phy. MSP, vol. 78, no. 8, pp. 1175-1179, 2004.
-
(2004)
App. Phy. MSP
, vol.78
, Issue.8
, pp. 1175-1179
-
-
Hjortstam, O.1
Isberg, P.2
Söderholm, S.3
Dai, H.4
-
28
-
-
50949088643
-
Benchmarking of metal-to-carbon nanotube side contact resistance
-
Z. Liu, L. Ci, N. Bajwa, P. M. Ajayan, and J.-Q. Lu, "Benchmarking of metal-to-carbon nanotube side contact resistance," in Proc. IITC, 2008, pp. 144-146.
-
(2008)
Proc. IITC
, pp. 144-146
-
-
Liu, Z.1
Ci, L.2
Bajwa, N.3
Ajayan, P.M.4
Lu, J.-Q.5
-
29
-
-
34547215354
-
System-level powerperformance trade-offs in bus matrix communication architecture synthesis
-
Oct.
-
S. Pasricha, Y. Park, F. Kurdahi, and N. Dutt, "System-level powerperformance trade-offs in bus matrix communication architecture synthesis," in Proc. CODES + ISSS, Oct. 2006, pp. 300-305.
-
(2006)
Proc. CODES + ISSS
, pp. 300-305
-
-
Pasricha, S.1
Park, Y.2
Kurdahi, F.3
Dutt, N.4
-
30
-
-
34748836557
-
Densification of carbon nanotube bundles for interconnect application
-
Liu, N. Bajwa, L. Ci, S. H. Lee, S. Kar, P. M. Ajayan, and J.-Q. Lu, "Densification of carbon nanotube bundles for interconnect application," in Proc. IITC, 2007, pp. 201-203.
-
(2007)
Proc. IITC
, pp. 201-203
-
-
Bajwa, L.N.1
Ci, L.2
Lee, S.H.3
Kar, S.4
Ajayan, P.M.5
Lu, J.-Q.6
-
31
-
-
35348870939
-
Assembling carbon nanotube bundles using transfer process for fine-pitch electrical interconnect applications
-
Z. Zhu, K.-S. Moon, B. Bertram, D. W. Hess, and C. P. Wong, "Assembling carbon nanotube bundles using transfer process for fine-pitch electrical interconnect applications," in Proc. EETC, 2007, pp. 1981-1985.
-
(2007)
Proc. EETC
, pp. 1981-1985
-
-
Zhu, Z.1
Moon, K.-S.2
Bertram, B.3
Hess, D.W.4
Wong, C.P.5
-
32
-
-
40449094185
-
-
Nano Lett
-
G. F. Close, S. Yasuda, B. Paul, S. Fujita, and H.-S. P. Wong, "A 1 GHz integrated circuit with carbon nanotube interconnects and silicon transistors," Nano Lett., vol. 8, no. 2, pp. 706-709, 2008.
-
(2008)
A 1 GHz integrated circuit with carbon nanotube interconnects and silicon transistors
, vol.8
, Issue.2
, pp. 706-709
-
-
Close, G.F.1
Yasuda, S.2
Paul, B.3
Fujita, S.4
Wong, H.-S.P.5
|