Effects of inductance on the propagation delay and repeater insertion in VLSI circuits

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 8, Issue 2, 2000, Pages 195-206

  Ismail, Yehea I ^b   Friedman, Eby G ^a,b  

^a IEEE

^b University of Rochester   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC NETWORK ANALYSIS; ELECTROMAGNETIC WAVE PROPAGATION; ERROR ANALYSIS; GATES (TRANSISTOR); INTEGRATED CIRCUIT LAYOUT; MATHEMATICAL MODELS;

PROPAGATION DELAY; REPEATER INSERTION;

VLSI CIRCUITS;

EID: 0033891230     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/92.831439     Document Type: Article

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