Reducing the number of lines in reversible circuits

Proceedings - Design Automation Conference

Volumn , Issue , 2010, Pages 647-652

  Wille, Robert ^a   Soeken, Mathias ^a   Drechsler, Rolf ^a  

^a UNIVERSITY OF BREMEN   (Germany)

Author keywords

Optimization; Quantum Computation; Reversible Logic

Indexed keywords

CIRCUIT LINE; GARBAGE OUTPUT; LOW-POWER DESIGN; NUMBER OF GATES; ORDERS OF MAGNITUDE; POST PROCESS; PRIMARY INPUTS; QUANTUM COMPUTATION; QUANTUM COSTS; REVERSIBLE CIRCUITS; REVERSIBLE LOGIC;

COMPUTATIONAL LINGUISTICS; COMPUTER AIDED DESIGN; LOGIC GATES; OPTIMIZATION; QUANTUM COMPUTERS; QUANTUM THEORY;

LOGIC CIRCUITS;

EID: 77956206495     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1837274.1837439     Document Type: Conference Paper

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