Improved quantum cost for n-bit Toffoli gates

Electronics Letters

Volumn 39, Issue 25, 2003, Pages 1790-1791

  Maslov, D ^a   Dueck, G W ^a  

^a UNIVERSITY OF NEW BRUNSWICK   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; COST EFFECTIVENESS; ELECTRIC NETWORK ANALYSIS; GATES (TRANSISTOR); LOGIC DESIGN; QUANTUM ELECTRONICS;

PERES GATES; QUANTUM CIRCUITS; TOFFOLI GATES;

ELECTRIC NETWORK SYNTHESIS;

EID: 0346392713     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:20031202     Document Type: Article

References (7)

1. Miller, D.M., Maslov, D., and Dueck, G.W.: 'A transformation based algorithm for reversible logic synthesis'. Proc. of the Design Automation Conf., June 2003, pp. 318-323
2. Maslov, D., Dueck, G., and Miller, M.: 'Fredkin/Toffoli templates for reversible logic synthesis'. Int. Conf. on Computer Aided Design, San Jose, CA, USA, November 2003
3. Nielsen, M., and Chuang, I.: 'Quantum computation and quantum information' (Cambridge University Press, 2000)
4. Barenco, A., et al.: 'Elementary gates for quantum computation', Phys. Rev. A, At. Mol. Opt. Phys., 1995, 52, pp. 3457-3467.
5. Peres, A.: 'Reversible logic and quantum computers', Phys. Rev. A, 1985, 32, p. 1556
6. Perkowski, M., et al.: 'A hierarchical approach to computer-aided design of quantum circuits'. 6th Int. Symp. on Representations and Methodology of Future Computing Technologies, Trier, Germany, March 2003, pp. 201-209
7. Maslov, D., Dueck, G., and Miller, M.: 'Templates for Toffoli network synthesis'. Int. Workshop on Logic synthesis, Laguna Beach, CA, USA, 2003, pp. 320-326