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Volumn 28, Issue 1, 2009, Pages 1517-1530

Electronic system-level synthesis methodologies

Author keywords

Electronic system level (ESL); Methodology; Synthesis

Indexed keywords

COMPLETE SYSTEM; DESIGN PROCESS; ELECTRONIC SYSTEM DESIGN; ELECTRONIC SYSTEM LEVEL; HARDWARE AND SOFTWARE; LEVELS OF ABSTRACTION; SEMICONDUCTOR ROADMAPS; SYNTHESIS METHODOLOGY; SYNTHESIS SOLUTION; SYNTHESIS TOOL; SYSTEM COMPLEXITY;

EID: 77955186266     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article
Times cited : (55)

References (42)
  • 1
    • 34547224724 scopus 로고    scopus 로고
    • Overview of the MPSoC design challenge
    • San Francisco, CA, Jul.
    • G. Martin, "Overview of the MPSoC design challenge," in Proc. DAC, San Francisco, CA, Jul. 2006, pp. 274-279.
    • (2006) Proc. DAC , pp. 274-279
    • Martin, G.1
  • 5
    • 70349747651 scopus 로고    scopus 로고
    • Embedded system synthesis and optimization
    • Rathen, Germany, Mar.
    • J. Teich, "Embedded system synthesis and optimization," in Proc. Workshop SDA, Rathen, Germany, Mar. 2000, pp. 9-22.
    • (2000) Proc. Workshop SDA , pp. 9-22
    • Teich, J.1
  • 6
    • 0012580885 scopus 로고
    • New VLSI tools
    • Dec.
    • D. D. Gajski and R. H. Kuhn, "New VLSI tools," Computer, vol. 16, no. 12, pp. 11-14, Dec. 1983.
    • (1983) Computer , vol.16 , Issue.12 , pp. 11-14
    • Gajski, D.D.1    Kuhn, R.H.2
  • 7
    • 38849111766 scopus 로고    scopus 로고
    • Reliable multiprocessor system-on-chip synthesis
    • C. Zhu, Z. P. Gu, R. P. Dick, and L. Shang, "Reliable multiprocessor system-on-chip synthesis," in Proc. CODES+ISSS, 2007, pp. 239-244.
    • (2007) Proc. CODES+ISSS , pp. 239-244
    • Zhu, C.1    Gu, Z.P.2    Dick, R.P.3    Shang, L.4
  • 9
    • 77955223939 scopus 로고    scopus 로고
    • [Online]. Available
    • [Online]. Available: http://www.forteds.com
  • 10
    • 70349750868 scopus 로고    scopus 로고
    • NEC System Technologies, Ltd., [Online]. Available
    • NEC System Technologies, Ltd., CyberWorkBench. [Online]. Available: http://www.necst.co.jp/product/cwb
    • CyberWorkBench
  • 12
    • 9644281035 scopus 로고    scopus 로고
    • Methods for evaluating and covering the design space during early design development
    • Dec.
    • M. Gries, "Methods for evaluating and covering the design space during early design development," Integr. VLSI J., vol. 38, no. 2, pp. 131-183, Dec. 2004.
    • (2004) Integr. VLSI J. , vol.38 , Issue.2 , pp. 131-183
    • Gries, M.1
  • 18
    • 34047168005 scopus 로고    scopus 로고
    • Flexible MPSoC platform with fast interconnect exploration for optimal system performance for a specific application
    • F. Dumitrascu, I. Bacivarov, L. Pieralisi, M. Bonaciu, and A. A. Jerraya, "Flexible MPSoC platform with fast interconnect exploration for optimal system performance for a specific application," in Proc. DATE Designers' Forum, 2006, pp. 166-171.
    • (2006) Proc. DATE Designers' Forum , pp. 166-171
    • Dumitrascu, F.1    Bacivarov, I.2    Pieralisi, L.3    Bonaciu, M.4    Jerraya, A.A.5
  • 19
    • 33847701228 scopus 로고    scopus 로고
    • A framework for co-synthesis of memory and communication architectures for MPSoC
    • Mar.
    • S. Pasricha and N. Dutt, "A framework for co-synthesis of memory and communication architectures for MPSoC," IEEE Trans. Comput.-Aided Design Integr. Circuits Syst., vol. 26, no. 3, pp. 408-420, Mar. 2007.
    • (2007) IEEE Trans. Comput.-aided Design Integr. Circuits Syst. , vol.26 , Issue.3 , pp. 408-420
    • Pasricha, S.1    Dutt, N.2
  • 22
    • 0000087207 scopus 로고
    • The semantics of a simple language for parallel programming
    • G. Kahn, "The semantics of a simple language for parallel programming," in Proc. IFIP Congr., 1974, pp. 471-475.
    • (1974) Proc. IFIP Congr. , pp. 471-475
    • Kahn, G.1
  • 23
    • 34247267792 scopus 로고    scopus 로고
    • PN: A tool for improved derivation of process networks
    • Jan. Article ID 75947
    • S. Verdoolaege, H. Nikolov, and T. Stefanov, "PN: A tool for improved derivation of process networks," EURASIP J. Embed. Syst., vol. 2007, no. 1, p. 19, Jan. 2007. Article ID 75947.
    • (2007) EURASIP J. Embed. Syst. , vol.2007 , Issue.1 , pp. 19
    • Verdoolaege, S.1    Nikolov, H.2    Stefanov, T.3
  • 24
    • 33744721815 scopus 로고    scopus 로고
    • A systematic approach to exploring embedded system architectures at multiple abstraction levels
    • Feb.
    • A. D. Pimentel, C. Erbas, and S. Polstra, "A systematic approach to exploring embedded system architectures at multiple abstraction levels," IEEE Trans. Comput., vol. 55, no. 2, pp. 99-112, Feb. 2006.
    • (2006) IEEE Trans. Comput. , vol.55 , Issue.2 , pp. 99-112
    • Pimentel, A.D.1    Erbas, C.2    Polstra, S.3
  • 25
    • 39749086249 scopus 로고    scopus 로고
    • Systematic and automated multi-processor system design, programming, and implementation
    • Mar.
    • H. Nikolov, T. Stefanov, and E. F. Deprettere, "Systematic and automated multi-processor system design, programming, and implementation," IEEE Trans. Comput.-Aided Design Integr. Circuits Syst., vol. 27, no. 3, pp. 542-555, Mar. 2008.
    • (2008) IEEE Trans. Comput.-aided Design Integr. Circuits Syst. , vol.27 , Issue.3 , pp. 542-555
    • Nikolov, H.1    Stefanov, T.2    Deprettere, E.F.3
  • 26
    • 49749151366 scopus 로고    scopus 로고
    • System-on-chip environment: A SpecC-based framework for heterogeneous MPSoC design
    • Jan.
    • R. Dömer, A. Gerstlauer, J. Peng, D. Shin, L. Cai, H. Yu, S. Abdi, and D. D. Gajski, "System-on-chip environment: A SpecC-based framework for heterogeneous MPSoC design," EURASIP J. Embed. Syst., vol. 2008, no. 3, pp. 1-13, Jan. 2008.
    • (2008) EURASIP J. Embed. Syst. , vol.2008 , Issue.3 , pp. 1-13
    • Dömer, R.1    Gerstlauer, A.2    Peng, J.3    Shin, D.4    Cai, L.5    Yu, H.6    Abdi, S.7    Gajski, D.D.8
  • 28
  • 29
    • 60349125677 scopus 로고    scopus 로고
    • SystemCoDesigner - An automatic ESL synthesis approach by design space exploration and behavioral synthesis for streaming applications
    • Jan.
    • J. Keinert, M. Streubühr, T. Schlichter, J. Falk, J. Gladigau, C. Haubelt, J. Teich, and M. Meredith, "SystemCoDesigner - An automatic ESL synthesis approach by design space exploration and behavioral synthesis for streaming applications," ACM Trans. Des. Autom. Electron. Syst., vol. 14, no. 1, pp. 1-23, Jan. 2009.
    • (2009) ACM Trans. Des. Autom. Electron. Syst. , vol.14 , Issue.1 , pp. 1-23
    • Keinert, J.1    Streubühr, M.2    Schlichter, T.3    Falk, J.4    Gladigau, J.5    Haubelt, C.6    Teich, J.7    Meredith, M.8
  • 30
    • 84939698077 scopus 로고
    • Synchronous data flow
    • Sep.
    • E. A. Lee and D. G. Messerschmitt, "Synchronous data flow," Proc. IEEE, vol. 75, no. 9, pp. 1235-1245, Sep. 1987.
    • (1987) Proc. IEEE , vol.75 , Issue.9 , pp. 1235-1245
    • Lee, E.A.1    Messerschmitt, D.G.2
  • 34
    • 51349156606 scopus 로고    scopus 로고
    • Classification of general data flow actors into known models of computation
    • Anaheim, CA, Jun.
    • C. Zebelein, J. Falk, C. Haubelt, and J. Teich, "Classification of general data flow actors into known models of computation," in Proc. MEMOCODE, Anaheim, CA, Jun. 2008, pp. 119-128.
    • (2008) Proc. MEMOCODE , pp. 119-128
    • Zebelein, C.1    Falk, J.2    Haubelt, C.3    Teich, J.4
  • 35
    • 70349260471 scopus 로고    scopus 로고
    • A generalized static data flow clustering algorithm for MPSoC scheduling of multimedia applications
    • Atlanta, GA, Oct.
    • J. Falk, J. Keinert, C. Haubelt, J. Teich, and S. Bhattacharyya, "A generalized static data flow clustering algorithm for MPSoC scheduling of multimedia applications," in Proc. EMSOFT, Atlanta, GA, Oct. 2008, pp. 189-198.
    • (2008) Proc. EMSOFT , pp. 189-198
    • Falk, J.1    Keinert, J.2    Haubelt, C.3    Teich, J.4    Bhattacharyya, S.5
  • 38
    • 34547824056 scopus 로고    scopus 로고
    • Quo vadis SLD: Reasoning about the trends and challenges of system level design
    • Mar. [Online]. Available
    • A. Sangiovanni-Vincentelli, "Quo vadis SLD: Reasoning about the trends and challenges of system level design," Proc. IEEE, vol. 95, no. 3, pp. 467-506, Mar. 2007. [Online]. Available: http://chess.eecs.berkeley.edu/ pubs/263.html
    • (2007) Proc. IEEE , vol.95 , Issue.3 , pp. 467-506
    • Sangiovanni-Vincentelli, A.1
  • 39
    • 77955200981 scopus 로고    scopus 로고
    • Gigascale Systems Research Center (GSRC), [Online]. Available
    • Gigascale Systems Research Center (GSRC), Core Design Technology for Complex Heterogeneous Systems. [Online]. Available: http://www.gigascale.org/ theme/core/
    • Core Design Technology for Complex Heterogeneous Systems
  • 41
    • 34548264660 scopus 로고    scopus 로고
    • PeaCE: A hardwaresoftware codesign environment of multimedia embedded systems
    • Aug.
    • S. Ha, S. Kim, C. Lee, Y. Yi, S. Kwon, and Y.-P. Joo, "PeaCE: A hardwaresoftware codesign environment of multimedia embedded systems," ACM Trans. Des. Autom. Electron. Syst., vol. 12, no. 3, pp. 1-25, Aug. 2007.
    • (2007) ACM Trans. Des. Autom. Electron. Syst. , vol.12 , Issue.3 , pp. 1-25
    • Ha, S.1    Kim, S.2    Lee, C.3    Yi, Y.4    Kwon, S.5    Joo, Y.-P.6


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.