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Volumn , Issue , 2010, Pages 460-470

Software data spreading: Leveraging distributed caches to improve single thread performance

Author keywords

chip multiprocessors; compilers; single thread performance

Indexed keywords

AGGREGATE CACHE; CACHE CAPACITY; CHIP MULTIPROCESSOR; COMPUTATIONAL RESOURCES; DISTRIBUTED CACHE; MICRO-BENCHMARK; MULTI CORE; MULTI PROCESSOR SYSTEMS; SOFTWARE DATA; SOFTWARE-ONLY TECHNIQUES; THREAD MIGRATION;

EID: 77954753229     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1806596.1806648     Document Type: Conference Paper
Times cited : (12)

References (37)
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  • 17
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    • A chip-multiprocessor architecture with speculative multithreading
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    • V. Krishnan and J. Torrellas. A chip-multiprocessor architecture with speculative multithreading". IEEE Transactions on Computers, September 1999.
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    • Krishnan, V.1    Torrellas, J.2
  • 27
    • 61749104310 scopus 로고    scopus 로고
    • Niagara 2 opens the floodgates
    • November
    • H. McGhan. Niagara 2 opens the floodgates. Microprocessor Reports, November 2006.
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    • McGhan, H.1
  • 28
    • 0003660453 scopus 로고
    • The organization of matrices and matrix operations in a paged multiprogramming environment
    • Mar.
    • A. McKeller and E. Coffman. The organization of matrices and matrix operations in a paged multiprogramming environment. Communications of the ACM, Mar. 1969.
    • (1969) Communications of the ACM
    • McKeller, A.1    Coffman, E.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.