Design and evaluation of compiler algorithms for pre-execution

International Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS

Volumn , Issue , 2002, Pages 159-170

  Kim, Dongkeun ^a   Yeung, Donald ^a  

^a UNIVERSITY OF MARYLAND   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ARCHITECTURAL SIMULATORS; C COMPILERS; COMPILER ALGORITHMS; CRITICAL CODES; EXECUTION TIME; HELPER THREAD; INTERMEDIATE FORMATS; LATENCY TOLERANCE; MEMORY OPERATIONS; MEMORY REFERENCES; NON-BLOCKING; PARALLELIZING; PERFORMANCE GAIN; PREFETCHES; PROGRAM SLICERS; PROGRAM SLICING; RUNNING-IN; STANFORD UNIVERSITY; THREAD LEVEL PARALLELISM;

ALGORITHMS; CACHE MEMORY; COMPUTER OPERATING SYSTEMS; LINGUISTICS;

PROGRAM COMPILERS;

EID: 0036949290     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/605397.605415     Document Type: Conference Paper

References (24)

1. M. Annavaram, J. Patel, and E. Davidson. Data Prefetching by Dependence Graph Precomputation. In 28th International Symposium on Computer Architecture, June 2001.
2. D. Binkley and K. Gallagher. A Survey of Program Slicing. Academic Press, 1996.
3. D. Burger and T. Austin. The SimpleScalar Tool Set, Version 2.0. CS TR 1342, University of Wisconsin-Madison, June 1997.
4. R. Chappell, S. Kim, S. Reinhardt, and Y. Patt. Simultaneous Subordinate Microthreading (SSMT). In 26th International Symposium on Computer Architecture, May 1999.
5. T.-F. Chen and J.-L. Baer. Effective Hardware-Based Data Prefetching for High-Performance Processors. Transactions on Computers, 44(5):609-623, May 1995.
6. J. Collins, D. Tullsen, H. Wang, and J. Shen. Dynamic Speculative Precomputation. In 34th International Symposium on Microarchitecture, December 2001.
7. J. Collins, H. Wang, D. Tullsen, C. Hughes, Y.-F. Lee, D. Lavery, and J. Shen. Speculative Precomputation: Longrange Prefetching of Delinquent Loads. In 28th International Symposium on Computer Architecture, June 2001.
8. R. Cytron. Doacross: Beyond Vectorization for Multiprocessors. In International Conference on Parallel Processing, August 1986.
9. M. Dubois and Y. Song. Assisted Execution. CENG TR 9825, University of Southern California, October 1998.
10. J. Dundas and T. Mudge. Improving Data Cache Performance by Pre-executing Instructions Under a Cache Miss. In International Conference on Supercomputing, July 1997.
11. S. Liao, P. Wang, H. Wang, G. Hoflehner, D. Lavery, and J. Shen. Post-Pass Binary Adaptation for Software-Based Speculative Precomputation. In ACM SIGPLAN Conference on Programming Language Design and Implementation, June 2002.
12. C.-K. Luk. Tolerating Memory Latency through Software- Controlled Pre-Execution in Simultaneous Multithreading Processors. In 28th International Symposium on Computer Architecture, June 2001.
13. J. Lyle and D. Wallace. Using the unravel program slicing tool to evaluate high integrity software. In 10th International Software Quality Week, May 1997.
14. J. Lyle, D. Wallace, J. Graham, K. Gallagher, J. Poole, and D. Binkley. Unravel: A CASE Tool to Assist Evaluation of High Integrity Software. NISTIR 5691, National Institute of Standards and Technology, August 1995.
15. D. Madon, E. Sanchez, and S. Monnier. A Study of a Simultaneous Multithreaded Processor Implementation. In EuroPar '99, August 1999.
16. T. Mowry. Tolerating Latency in Multiprocessors through Compiler-Inserted Prefetching. Transactions on Computer Systems, 16(1):55-92, February 1998.
17. D. Padua, D. Kuck, and D. Lawrie. High-Speed Multiprocessors and Compilation Techniques. IEEE Transactions on Computers, C-29(9):763-776, September 1980.
18. D. Padua and M. Wolfe. Advanced Compiler Optimizations for Supercomputers. Communications of the ACM, 29(12): 1184-1201, December 1986.
19. A. Roth, A. Moshovos, and G. Sohi. Dependence Based Prefetching for Linked Data Structures. In 8th International Conference on Architectural Support for Programming Languages and Operating Systems, October 1998.
20. A. Roth and G. Sohi. Speculative Data-Driven Multithreading. In 7th International Conference on High Performance Computer Architecture, January 2001.
21. K. Sundaramoorthy, Z. Purser, and E. Rotenberg. Slipstream Processors: Improving Both Performance and Fault Tolerance. In 9th International Conference on Architectural Support for Programming Languages and Operating Systems, May 2000.
22. D. Tullsen, S. Eggers, J. Emer, H. Levy, J. Lo, and R. Stamm. Exploiting Choice: Instruction Fetch and Issue on an Implementable Simultaneous Multithreading Processor. In 23th International Symposium on Computer Architecture, May 1996.
23. C. Zilles and G. Sohi. Execution-Based Prediction Using Speculative Slices. In 28th International Symposium on Computer Architecture, June 2001.
24. C. Zilles and G. Sohi. Understanding the Backward Slices of Performance Degrading Instructions. In 27th International Symposium on Computer Architecture, June 2000.