Silane and ammonia surface passivation technology for high-mobility In 0.53Ga0.47As MOSFETs

IEEE Transactions on Electron Devices

Volumn 57, Issue 5, 2010, Pages 973-979

  Chin, Hock Chun ^a   Liu, Xinke ^a   Gong, Xiao ^a   Yeo, Yee Chia ^a  

^a NATIONAL UNIVERSITY OF SINGAPORE   (Singapore)

Author keywords

High mobility; High ; InGaAs; Metal oxide semiconductor field effect transistor (MOSFET); Surface passivation

Indexed keywords

COMPOUND SEMICONDUCTORS; DIELECTRIC DEPOSITION; GATE STACKS; HIGH MOBILITY; HIGH QUALITY; INTERFACE STATE DENSITY; INTERFACIAL LAYER; MATERIAL COMPOSITIONS; METAL-OXIDE-SEMICONDUCTOR FIELD-EFFECT TRANSISTOR; MOS-FET; MOSFETS; NATIVE OXIDES; NMOSFETS; OFF-STATE LEAKAGE CURRENT; SILICON OXYNITRIDES; SUBTHRESHOLD SWING; SURFACE PASSIVATION;

AMMONIA; CARRIER MOBILITY; DIELECTRIC DEVICES; DIELECTRIC MATERIALS; FIELD EFFECT TRANSISTORS; MOSFET DEVICES; SEMICONDUCTING INDIUM; SILICON NITRIDE; SILICON OXIDES; SPURIOUS SIGNAL NOISE; SURFACE MORPHOLOGY; SURFACES;

PASSIVATION;

EID: 77951620634     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2010.2044285     Document Type: Article

References (29)

1. G. G. Fountain, R. A. Rudder, S. V. Hattangady, R. J. Markunas, and J. A. Hutchby, "Demonstration of an n-channel inversion mode GaAs MISFET, " in IEDM Tech. Dig., Dec. 1989, pp. 887-889.
2. 3 process for GaAs inversion/accumulation device and surface passivation applications, " in IEDM Tech. Dig., Dec. 1995, pp. 383-386.
3. F. Hasegawa, M. Onomura, C. Mogi, and Y. Nannichi, "Reduction of Schottky barrier heights by surface oxidation of GaAs and its influence on DLTS signals for the midgap level EL2, " Solid State Electron., vol. 31, no. 2, pp. 223-228, Feb. 1988.
4. W. E. Spicer, Z. Liliental-Weber, E. Weber, N. Newman, T. Kendelewicz, R. Cao, C. McCants, P. Mahowald, K. Miyano, and I. Lindau, "The advanced unified defect model for Schottky barrier formation, " J. Vac. Sci. Technol. B, vol. 6, no. 4, pp. 1245-1251, Jul. 1988.
5. F. Sankey, R. E. Allen, S.-F. Ren, and J. D. Dow, "Dangling bonds and Schottky barriers, " J. Vac. Sci. Technol. B, vol. 3, no. 4, pp. 1162-1166, Jul. 1985.
6. M. Hong, J. Kwo, A. R. Mannaerts, and A. M. Sergent, "Epitaxial cubic gadolinium oxide as a dielectric for gallium arsenide passivation, " Science, vol. 283, no. 5409, pp. 1897-1900, Mar. 1999.
7. x, 0 ≤ x ≤ 1.0 films, " Appl. Phys. Lett., vol. 75, no. 8, pp. 1116-1118, Aug. 1999.
8. K. Rajagopalan, R. Droopad, J. Abrokwah, P. Zurcher, P. Fejes, and M. Passlack, "1-μm enhancement mode GaAs n-channel MOSFETs with transconductance exceeding 250 mS/mm, " IEEE Electron Device Lett., vol. 28, no. 2, pp. 100-102, Feb. 2007.
9. 0.25As MOSFETs with ALD high-k as gate dielectric, " in IEDM Tech. Dig., Dec. 2008, pp. 371-374.
10. D. Lin, G. Brammertz, S. Sioncke, C. Fleischmann, A. Delabie, K. Martens, H. Bender, T. Conard, W. H. Tseng, J. C. Lin, W. E. Wang, K. Temst, A. Vatomme, J. Mitard, M. Caymax, M. Meuris, M. Heyns, and T. Hoffmann, "Enabling the high-performance InGaAs/Ge CMOS: A common gate stack solution, " in IEDM Tech. Dig., Dec. 2009, pp. 327-330.
11. Y. Q. Wu, M. Xu, R. S. Wang, O. Koybasi, and P. D. Ye, "High performance deep-submicron inversion-mode InGaAs MOSFETs with maximum Gm exceeding 1.1 mS/μm: New HBr pretreatment and channel engineering, " in IEDM Tech. Dig., Dec. 2009, pp. 323-326.
12. 3 gate dielectrics on GaAs grown by atomic layer deposition, " Appl. Phys. Lett., vol. 86, no. 15, pp. 152904-152906, Apr. 2005.
13. 1-xAs channels for NFETs, " in IEDM Tech. Dig., Dec. 2008, pp. 363-366.
14. 2 gate stack, " in IEDM Tech. Dig., Dec. 2009, pp. 335-338.
15. 4, " Appl. Phys. Lett., vol. 90, no. 19, p. 193 503, May 2007.
16. Y. Cao, X. Li, J. Zhang, P. Fay, T. H. Kosel, and D. C. Hall, "Microwave performance of GaAs MOSFET with wet thermally oxidized InAlP gate dielectric, " IEEE Electron Device Lett., vol. 27, no. 5, pp. 317-319, May 2006.
17. 0.3As quantum well field effect transistors on silicon substrate for low power logic applications, " in IEDM Tech. Dig., Dec. 2009, pp. 319-322.
18. I. Ok, H. Kim, M. Zhang, T. Lee, F. Zhu, L. Yu, S. Koveshnikov, W. Tsai, V. Tokranov, M. Yakimov, S. Oktyabrsky, and J. C. Lee, "Self-aligned n-and p-channel GaAs MOSFETs on undoped and p-type substrates using HfO2 and silicon interface passivation layer, " in IEDM Tech. Dig., 2006, pp. 829-832.
19. H.-C. Chin, M. Zhu, C.-H. Tung, G. S. Samudra, and Y.-C. Yeo, "In situ surface passivation and CMOS-compatible palladium-germanium contacts for surface-channel gallium arsenide MOSFETs, " IEEE Electron Device Lett., vol. 29, no. 6, pp. 553-556, Jun. 2008.
20. M. Zhu, C.-H. Tung, and Y.-C. Yeo, "Aluminum oxynitride interfacial passivation layer for high-permittivity gate dielectric stack on gallium arsenide, " Appl. Phys. Lett., vol. 89, no. 20, p. 202 903, Nov. 2006.
21. 2/Ta N gate stack, " in IEDM Tech. Dig., Dec. 2008, pp. 401-404.
22. H. J. Oh, J. Q. Lin, S. A. B. Suleiman, G. Q. Lo, D. L. Kwong, D. Z. Chi, and S. J. Lee, "Thermally robust phosphorous nitride interface passivation for InGaAs self-aligned gate-first n-MOSFET integrated with high-k dielectric, " in IEDM Tech. Dig., Dec. 2009, pp. 339-342.
23. H.-C. Chin, M. Zhu, Z.-C. Lee, X. Liu, K.-M. Tan, H. K. Lee, L. Shi, L.-J. Tang, C.-H. Tung, G.-Q. Lo, L.-S. Tan, and Y.-C. Yeo, "New silane-ammonia surface passivation technology for realizing inversiontype surface-channel GaAs N-MOSFET with 160 nm gate length and high-quality metal-gate/high-k dielectric stack, " in IEDM Tech. Dig., Dec. 2008, pp. 383-386.
24. H.-C. Chin, M. Zhu, X. Liu, H.-K. Lee, L. Shi, L.-S. Tan, and Y.-C. Yeo, "Silane-ammonia surface passivation for gallium arsenide surface-channel n-MOSFETs, " IEEE Electron Device Lett., vol. 30, no. 2, pp. 110-112, Feb. 2009.
25. T. Suzuki and T. Nishinaga, "Surface diffusion and atom incorporation kinetics in MBE of InGaAs and AlGaAs, " J. Cryst. Growth, vol. 111, no. 1-4, pp. 173-177, May 1991.
26. 0.47As, " Jpn. J. Appl. Phys., vol. 38, no. 2 B, pp. 1204-1207, Feb. 1999.
27. G. Groeseneken, H. E. Maes, N. Beltran, and R. F. De Keersmaecker, "A reliable approach to charge-pumping measurements in MOS transistors, " IEEE Trans. Electron Devices, vol. ED-31, no. 1, pp. 42-53, Jan. 1984.
28. 2/GaAs band-lineup effects, " Phys. Rev. B, Condens. Matter, vol. 49, no. 16, pp. 11117-11126, Apr. 1994.
29. S. Takagi, A. Toriumi, M. Iwase, and H. Tango, "On the universality of inversion layer mobility in Si MOSFETs: Part I-Effects of substrate impurity concentration, " IEEE Trans. Electron Devices, vol. 41, no. 12, pp. 2357-2362, Dec. 1994.