Addressing the gate stack challenge for high mobility in xGa 1-xas channels for NFETs

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 2008, Pages

  Goel, N ^a   Heh, D ^b   Koveshnikov, S ^a   Ok, I ^b   Oktyabrsky, S ^c   Tokranov, V ^c   Kambhampati, R ^c   Yakimov, M ^c   Sun, Y ^d   Pianetta, P ^d   Gaspe, C K ^e   Santos, M B ^e   Lee, J ^f   Datta, S ^g   Majhi, P ^a,b   Tsai, W ^a  

^a INTEL CORPORATION   (United States)

^b SEMATECH   (United States)

^c STATE UNIVERSITY OF NEW YORK   (United States)

^d SLAC NATIONAL ACCELERATOR LABORATORY   (United States)

^e UNIVERSITY OF OKLAHOMA   (United States)

^f UNIVERSITY OF TEXAS AT AUSTIN   (United States)

^g PENNSYLVANIA STATE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTROSTATIC CONTROLS; GATE STACKS; HIGH ELECTRON MOBILITIES; HIGH MOBILITIES; INTERFACE STRUCTURES; LOW-POWER; MOSFETS; SURFACE CHANNELS; THERMAL STABILITIES;

CHARGE TRAPPING; ELECTRON DEVICES; ELECTRON MOBILITY; GALLIUM; LOGIC GATES; SEMICONDUCTING INDIUM;

GATE DIELECTRICS;

EID: 64549090588     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.2008.4796695     Document Type: Conference Paper

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