High performance deep-submicron inversion-mode InGaAs MOSFETs with maximum Gm exceeding 1.1 mS/μm: New HBr Pretreatment and channel engineering

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 2009, Pages

  Wu, Y Q ^a   Xu, M ^a   Wang, R S ^a   Koybasi, O ^a   Ye, P D ^a  

^a PURDUE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CHANNEL ENGINEERING; CHANNEL LENGTH; DEEP SUB-MICRON; EXTRINSIC TRANSCONDUCTANCE; GATE LENGTH; GATE OXIDE THICKNESS; III-V MOSFET; IMPLANTATION PROCESS; INTERFACE QUALITY; MOS-FET; MOSFETS; PRE-TREATMENT; STATE PERFORMANCE; TRANSISTOR SCALING;

ELECTRON DEVICES; GATE DIELECTRICS; GATES (TRANSISTOR); SEMICONDUCTING INDIUM;

MOSFET DEVICES;

EID: 77952345218     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.2009.5424358     Document Type: Conference Paper

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