Silane-ammonia surface passivation for gallium arsenide surface-channel n-MOSFETs

IEEE Electron Device Letters

Volumn 30, Issue 2, 2009, Pages 110-112

  Chin, Hock Chun ^a   Zhu, Ming ^a   Liu, Xinke ^a   Lee, Hock Koon ^b   Shi, Luping ^b   Tan, Leng Seow ^a   Yeo, Yee Chia ^a  

^a NATIONAL UNIVERSITY OF SINGAPORE   (Singapore)

^b DATA STORAGE INSTITUTE   (Singapore)

Author keywords

GaAs; High mobility; High k; MOSFET; Surface passivation

Indexed keywords

AMMONIA; ARSENIC COMPOUNDS; GALLIUM; GALLIUM ALLOYS; GALLIUM COMPOUNDS; MOSFET DEVICES; ORGANIC CHEMICALS; ORGANIC COMPOUNDS; SEMICONDUCTING GALLIUM; SILANES; SILICON NITRIDE; SPURIOUS SIGNAL NOISE;

GAAS; HIGH MOBILITY; HIGH-K; MOSFET; SURFACE PASSIVATION;

PASSIVATION;

EID: 59649110836     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2008.2010831     Document Type: Article

References (14)

1. 3 process for GaAs inversion/accumulation device and surface passivation applications," in IEDM Tech. Dig., 1995, pp. 383-386.
2. M. Hong, J. Kwo, A. R. Kortan, J. P. Mannaerts, and A. M. Sergent, "Epitaxial cubic gadolinium oxide as a dielectric for gallium arsenide passivation," Science, vol. 283, no. 5409, pp. 1897-1900, Mar. 1999.
3. P. D. Ye, G. D. Wilk, J. Kwo, B. Yang, H.-J. L. Gossmann, M. Frei, S. N. G. Chu, J. P. Mannaerts, M. Sergent, M. Hong, K. K. Ng, and J. Bude, "GaAs MOSFET with oxide gate dielectric grown by atomic layer deposition," IEEE Electron Device Lett., vol. 24, no. 4, pp. 209-211, Apr. 2003.
4. 3 gate dielectrics on GaAs grown by atomic layer deposition," Appl. Phys. Lett., vol. 86, no. 15, pp. 152 904-152 906, Apr. 2005.
5. Y. Cao, X. Li, J. Zhang, P. Fay, T. H. Kosel, and D. C. Hall, "Microwave performance of GaAs MOSFET with wet thermally oxidized InAlP gate dielectric," IEEE Electron Device Lett., vol. 27, no. 5, pp. 317-319, May 2006.
6. M. Zhu, C.-H. Tung, and Y.-C. Yeo, "Aluminum oxynitride interfacial passivation layer for high-permittivity gate dielectric stack on gallium arsenide," Appl. Phys. Lett., vol. 89, no. 20, p. 202 903, Nov. 2006.
7. 2 and silicon interface passivation layer," in IEDM Tech. Dig., 2006, pp. 829-832.
8. 4," Appl. Phys. Lett., vol. 90, no. 19, p. 193 503, May 2007.
9. 2 and HfAlO as gate dielectrics," in IEDM Tech. Dig. 2007, pp. 637-640.
10. H.-C. Chin, M. Zhu, C.-H. Tung, G. S. Samudra, and Y.-C. Yeo, "In situ surface passivation and CMOS-compatible palladium-germanium contacts for surface-channel gallium arsenide MOSFETs," IEEE Electron Device Lett., vol. 29, no. 6, pp. 553-556, Jun. 2008.
11. H.-C. Chin, M. Zhu, S.-J. Whang, C.-H. Tung, G. S. Samudra, and Y.-C. Yeo, "In-situ surface passivation and metal-gate/high-k dielectric stack formation for n-channel gallium arsenide metal-oxide-semiconductor field-effect transistors," in Proc. VLSI-TSA Symp. Tech. Dig., 2008, pp. 26-27.
12. F. Hyuga, H. Yamazaki, K. Watanabe, and J. Osaka, "Activation efficiency improvement in Si-implanted GaAs by P co-implantation," Appl. Phys. Lett., vol. 50, no. 22, pp. 1592-1594, Jun. 1987.
13. 2," Appl. Surf. Sci., vol. 123/124, pp. 120-125, 1998.
14. W. Zhu, J.-P. Han, and T. P. Ma, "Mobility measurement and degradation mechanisms of MOSFETs made with ultrathin high-k dielectrics," IEEE Trans. Electron Devices, vol. 51, no. 1, pp. 98-105, Jan. 2004.